Products for Wired/Wireless Networking

Arm is the world's leading technology provider of silicon IP for the intelligent system-on-chips at the heart of billions of devices. Our portfolio of products enable partners to innovate and get-to-market faster on a secure architecture built for performance and power efficiency. Find the right processor IP for your application.

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Supreme performance at optimal power
Powering the most energy-efficient embedded devices
Robust real-time performance
Custom-designed for ultimate performance and specific market needs
Highest performance for machine learning inference
Highest graphics performance for flagship gaming experiences
Higher graphics performance combined with power efficiency
Advanced ISPs for human display and computer vision applications
Scalable and flexible for cloud to edge infrastructure
Fully verified, PPA-optimized, customizable Neoverse compute subsystems
Powerful solutions for physical security applications
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Cortex-A

Cortex-A7

Smallest and most efficient 32-bit Armv7-A processor.
  • Enhanced hardware virtualization provided by Armv7-A extensions.
  • Improved memory performance of up to 20 percent over its predecessors.
  • Supports 32-bit, rich operating systems, including Linux.

Neoverse

Neoverse N3

Performance-per-watt optimized for hyperscale, 5G, enterprise networking, and infrastructure edge workloads.
  • 20% greater performance-per-watt efficiency compared to Neoverse N2.
  • 2MB L2 cache option offers nearly 3x performance gains on ML workloads.

Neoverse Compute Subsystems

Neoverse CSS N3

The Arm Neoverse N3 platform, validated and optimized by Arm, is helping reduce time-to-market, cost, and risk.
  • Highly configurable to target 5G, enterprise networking, and infrastructure edge use cases.
  • Supports from 8 to 32 Neoverse N3 cores per die.

Neoverse CSS N2

The market leading performance-per-watt of the Arm Neoverse N2 platform, delivered as a fully verified, customizable compute subsystem.
  • Up to 64 Neoverse N2 cores in a 5nm advanced process.
  • Up to 1MB L2 private cache per core and up to 64MB shared system-level cache.
  • Up to 8x DDR5 40b or LPDDR5 channels.
  • Up to 4x x16 PCIe/CXL Gen5 lanes.
A Comprehensive Guide to Understand AI Inference on the CPU thumbnail

Understanding AI Inference on Arm CPUs

Demand for running AI workloads on CPU is growing. This comprehensive guide provides a deep dive into CPU inference and the use cases for which this may be the practical choice. Explore the industries that are already benefiting from AI on CPU and learn about real-world examples.

Download Guide
Arm Licensing Models

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Arm’s cutting-edge solutions are easily accessible through our subscription-based licensing options. In just a few clicks, find out if your company has an active subscription to the technology that’s shaping the future of computing.

Once you confirm your subscription, explore a treasure trove of IP, powerful tools, and innovative models—all designed to help elevate your projects and get you started on building the future of computing on Arm.

Plus, our experts are here to guide you every step of the way. With seamless access and guided excellence, learn how to harness the full potential of Arm technology. From IP integration to advanced modeling, we’ve got you covered.

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