Comprehensive Component Library for Debug and Trace Functionality

The CoreSight SoC-400 library offers configurable components, including debug access, trace generation manipulation and output, cross triggering, and time stamping to meet the exact requirements of your system, regardless of size. With a rich development history, CoreSight SoC-400 is the standard for Arm-based SoC designs and can help safeguard against costly delays. Widely accepted as the standard for debug and trace IP, it enjoys broad support from the tooling ecosystem.

Features and Benefits

Debug Access

Enables you to build the interface between an external debugger, using, JTAG or SWD for example, and processors, memory systems, and other CoreSight components. Post-mortem debugging reduces both bug cost and the time to market.


Trace lets you generate and end trace buses, and provides the links between source and sink. Arm provides separate trace components for the generation of system trace, the System Trace Macrocell (STM), and the management of intermediate and termination of trace buses, Trace Memory Controller (TMC).

Software Debugging

Hardware and software co-development with a debugger in simulation and emulation helps improve reliability.


Components can control actions from and to other components.

SoC Bring up

Faster bring up means a reduced time to market.

Use Cases

Where Innovation and Ideas Come to Life

Improved care at reduced cost across health-centric applications. Support for innovative applications in preventative care, including blood sugar monitors and heart-rate trackers.

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Arm makes it easy to understand what you need to design an Arm SoC. Talk to an expert today and learn more.

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SoC-400 Resources

Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.


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