Processor IP for the Widest Range of Devices

Arm is the leading technology provider of processor IP, offering the widest range of cores to address the performance, power, and cost requirements of every device—from IoT sensors to supercomputers, and from smartphones and laptops to autonomous vehicles.

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Supreme performance at optimal power
Powering the most energy-efficient embedded devices
Robust real-time performance
Highest performance for machine learning inference
Scalable and flexible for cloud to edge infrastructure
Powerful solutions for physical security applications
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Second-generation Armv9.2 premium-efficiency, out-of-order CPU for sustained performance in a constrained power envelope.
  • Designed to enhance consumer experience with AAA gaming and web browsing.
  • Delivers increased sustained performance within fixed power envelope.
  • Continues the area-optimized configurability option for cost-constrained markets.


The first Armv9-A high-performance Cortex-A CPU based on Arm DynamIQ technology and designed for safety critical applications.
  • Designed for the next generation of software defined vehicles.
  • Arm DynamIQ Shared Unit, DSU-120AE, brings increased levels of scalability.
  • Introduces safety features for both ISO 26262 ASIL B and ASIL D certifications.


First Armv9.2 premium-efficiency CPU based on DynamIQ technology. Offers sustained performance in a constrained power envelope.
  • Built for next-generation consumer devices.
  • Delivers consistently high performance for wearables, smartphones, and laptops.
  • Offers new area configurability for an expanded range of use cases.


Second-generation Armv9 “big” CPU for best-in-class efficient performance.
  • The CPU cluster workhorse across "big.LITTLE" configurations.
  • Targeted microarchitecture optimizations for 20% power efficiency improvements.
  • Consistent performance gains to match Cortex-X1, Arm’s first-generation Cortex-X CPU.


First-generation Armv9 “big” CPU that offers a balance of performance and efficiency.
  • Addition of Armv9 architecture features for enhanced performance and security.
  • Optimal for mobile compute use cases such as smartphones and smart TVs.
  • 30% increase in energy efficiency compared to Cortex-A78.


High-efficiency Armv9.2 Cortex-A CPU for safety-critical applications, bringing power efficiency in the smallest silicon footprint.
  • Designed for the next generation of software defined vehicles (SDVs).
  • Innovative micro-architecture delivering highly efficient performance.
  • Split-lock feature to build silicon once and address multiple markets.


First Armv9.2 high-efficiency “LITTLE” CPU.
  • Most performant, high-efficiency CPU with improved power efficiency (up to 22% vs Cortex-A510) for DoU/real-world use cases.
  • New QARMA3 PAC algorithm lowers the performance cost, strengthening PAC deployment in the consumer technology market.
  • AArch64-only CPU for building big.LITTLE clusters across the consumer technology market.


First-generation Armv9 high-efficiency “LITTLE” CPU.
  • Large performance increases for a highly efficient CPU.
  • Innovative microarchitecture upgrades.
  • Over 3x uplift in ML performance compared to Cortex-A55.


The fourth generation high-performance CPU based on DynamIQ technology. The most efficient premium Cortex-A CPU.
  • Built for next generation consumer devices.
  • Enabling immersive experiences on new form factors and foldables.
  • Improving ML device responsiveness and capabilities such as face and speech recognition.


Providing market-specific solutions with advanced security features and large big-core configurations.
  • Performance for laptop class productivity and gaming on-the-go.
  • Advanced data and device security with Pointer Authentication.
  • Improved scalability with up to 8 big core only configuration and up to 8MB L3 cache.


A High-performance Cortex-A CPU based on Arm DynamIQ and designed for safety-critical applications.
  • Designed for the software-defined vehicle.
  • Split-lock capability with hybrid mode for efficient functional safety and post-silicon flexibility.
  • ISO 26262 ASIL D certifications, and enhanced features targeted at ASIL B and quality management use cases.


Third-generation high-performance CPU based on DynamIQ technology.
  • Leadership performance and efficiency for 5G mobile solutions.
  • Improved responsiveness for on device machine learning.
  • Built for next-gen smartphones and laptops.


Second-generation high-performance CPU based on DynamIQ technology.
  • Designed for devices undertaking complex compute tasks.
  • Greater single threaded performance and improved energy efficiency.
  • Enables faster responsiveness and at-the-edge support for machine learning applications.


The world’s first autonomous-class processor with integrated safety features.
  • Purpose-built for functional safety applications such as ADAS and autonomous vehicles.
  • First application processor with Split-Lock capability.
  • Safety capable to industry standards, including ISO 26262 ASIL D.


First-generation high-performance CPU based on DynamIQ technology.
  • Flexible architecture provides a broad ecosystem of support.
  • Executes up to three instructions in parallel per clock cycle.
  • Broad market use covers smartphones, servers, automotive applications and more.


Highly power-efficient CPU that maintains high-performance.
  • Increased power efficiency of up to 30 percent over predecessors.
  • Smallest Armv8-A processor.
  • Designed for mobile and consumer applications.


High-performance CPU that has multiple uses including mobile and embedded technologies.
  • Advanced branch predictor reduces wasted energy consumption.
  • Gain significant advantages in reduced memory requirements.
  • Suitable for implementation in an Arm big.LITTLE configuration.


Arm’s first multithreaded Cortex-A CPU with Split-Lock for functional safety.
  • Best-in-class throughput efficiency for memory intensive workloads.
  • Highest levels of safety with Dual Core Lock-Step for demanding safety-critical tasks.
  • Supports Split-Lock for improved cost efficiency in mixed-criticality applications.


Arm’s first multithreaded Cortex-A CPU.
  • Best-in-class throughput efficiency for memory intensive workloads.
  • Processes two threads simultaneously, scales up to eight cores in a single cluster.
  • Built on DynamIQ technology, supports an array of configurations.


Highest efficiency mid-range processor that can be paired with a high-performance CPU in a DynamIQ configuration.
  • Flexible design meets requirements to support broad market application.
  • Ideal for smaller devices with constrained environments.
  • Designed for compatibilty with DynamIQ configurations.


The most widely-used mid-range processor with balanced performance and efficiency.
  • Available in Arm Flexible Access.
  • The choice for high single thread and FPU/Neon performance.
  • Supports a wide range of applications across automotive and networking and more.
  • Most widely deployed 64-bit Armv8-A processor.


Armv8-A processor that seamlessly supports 32-bit and 64-bit.
  • Power management features reduce the power budget.
  • Supports 64-bit processing suitable for embedded applications.
  • Ideal processor to use for IoT nodes and gateways.


Smallest and most power-efficient 64-bit Armv8-A processor.
  • Scalable from a single core or up to a cluster of 4 processors.
  • Advanced power management with idle power management features.
  • Supports 64-bit processing suitable for embedded applications.


Smallest and lowest power Armv8-A processor.
  • Advanced power management with idle power mangement features.
  • Scalability of use as a single core or up to a cluster of four processors.
  • Logical choice for embedded and IoT markets.


Smallest and most efficient 32-bit Armv7-A processor.
  • Enhanced hardware virtualization provided by Armv7-A extensions.
  • Improved memory performance of up to 20 percent over its predecessors.
  • Supports 32-bit, rich operating systems, including Linux.


Customizable Armv7-A processor for high-performance in a low-power profile.
  • Scalable versatility for cost-sensitive, low-power applications.
  • Advanced features and rich OS support for the smallest devices.
  • Access at $0 through Arm Flexible Access.



Highest-performing Cortex-M processor with Arm Helium technology.
  • Unprecedented scalar, DSP, and ML performance for demanding use cases.
  • Offers enhanced software security with TrustZone and PACBTI extension to accelerate the route to PSA Certified silicon. 
  • Optional support for Arm Custom Instructions, enabling product differentiation without fragmentation.


Mainstream Cortex-M processor with Arm Helium technology.
  • Efficient scalar, ML, and DSP performance for general purpose applications.
  • Arm TrustZone accelerates the route to PSA Certified silicon. 
  • Optional support for Arm Custom Instructions, enabling product differentiation without fragmentation.


The smallest implementation of Armv8.1-M with Arm Helium Technology.
  • Efficient scalar, ML, and DSP performance for cost sensitive designs.
  • Offers enhanced software security with TrustZone and PACBTI extension to accelerate the route to PSA Certified silicon.
  • Optional support for Arm Custom Instructions, enabling product differentiation without fragmentation.


The first Armv8-M processor with tamper resistance built in.
  • Added physical resilience and system safety functions won't compromise performance.
  • Includes the option of integrated digital signal processing (DSP).
  • Layers of protection guard against easy attacks and system takeovers.


Ideal blend of real-time determinism, efficiency and security.
  • Simplifies digital signal processing with security.
  • Differentiate your product with TrustZone software isolation.
  • Brings 32-bit performance to even the simplest and cost-sensitive devices.


Smallest and lowest power microcontroller with TrustZone security.
  • Includes built-in security foundation with TrustZone; Memory protection minimizes the of risk unexpected access.
  • Ideal processor for use in energy-harvesting IoT nodes and small sensors.
  • Access at $0 through Arm Flexible Access.


High-performance Cortex-M processor.
  • Simplifies signal processing to bring high-performance DSP to the masses.
  • Built in floating point processing reduces power consumption.
  • Supports innovative MCUs for more intensive automation tasks.


Control and performance for mixed signal devices.
  • Integrated digital signal processing (DSP) simplifies system design.
  • Essential microcontroller features make it ideal for industrial applications.
  • Most widely deployed Cortex-M processor with broad ecosystem.


Exceptional 32-bit performance with low power consumption.
  • Access at $0 through Arm Flexible Access.
  • Commonly used across many smart home devices.
  • Deployed in billions of devices across a broad set of embedded applications.


Small, low-power Cortex-M processor for FPGA devices.
  • Available for a no license fee through DesignStart FPGA.
  • Based on the most proven and trusted embedded architecture.
  • Optimised for FPGA development.


Most energy-efficient Arm processor available.
  • Take advantage of 32-bit processing intelligence at an 8-bit cost.
  • Three highly optimized low power modes conserve energy.
  • Most commonly used in wearables for healthcare, fitness and more.


Smallest Arm processor available.
  • Access at $0 through Arm Flexible Access.
  • Ideal for smart sensors and mixed signal systems-on-chip (SoC).
  • Three highly optimized low power modes conserve energy.



Highest performing real-time safety processor.
  • High-performance single-thread 64-bit real-time processing.
  • Enabling real-time advanced safety applications.
  • Implements MMU for rich OS support.


Highest performance real-time processor.
  • Offers efficient, high-performance compute for complex storage applications.
  • Supports Arm Neon technology for ML acceleration.
  • Implements MMU for rich OS support.


Advanced processor for functional safety.
  • Enables advanced safety features for a range of automotive applications.
  • Software separation protects safety-critical code.
  • High-performance multicore clusters deliver real-time responsiveness.


Real-time virtualization support for functional safety.
  • Software separation enables integration of multiple operating systems while protecting safety-critical code.
  • High-performance multicore clusters deliver real-time responsiveness.


High performance processor suited for storage controllers and modems.
  • Offers low latency.
  • Configurable ports support flexible design options.
  • Delivers the responsive power needed for high-performance mass storage applications.


Offers seamless, real-time performance with functional safety.
  • Dual core configurations enables twice the performance of previous Cortex-R processors.
  • Ideally suited for the development of safety-critical products.
  • Most commonly used in high-volume deeply embedded SoC applications.


Smallest, real-time performance processor.
  • Offers excellent energy efficiency and cost effectiveness.
  • Prioritize reliability and error management with built-in error handling.
  • Ideal for embedded applications including automobiles and cameras.

Ethos - NPUs


Enabling edge AI use cases with generative AI capabilities.
  • Delivers up to 4 TOPs scalable ML performance.
  • 20% improvements in energy efficiency than previous Ethos-U NPUs.
  • Native support for transformer networks.


Powering innovation in a new world of AI devices at the edge and endpoint.
  • Delivers 1.0 TOP/s ML performance in about 0.6 mm2.
  • Partner configurable from 256 to 512 8-bit MACs.
  • Unified toolchain supports Cortex-M and Cortex-A based systems.


Configurable and efficient embedded ML inference.
  • Delivers up to 0.5 TOP/s, a 480x ML up lift and 90% energy reduction.
  • Partner configurable from 32 to 256 8-bit MACs in around 0.1mm2.
  • Rapid development with a single tool chain for Cortex-M and Ethos-U.


Bridges the gap between existing neural network frameworks and the underlying IP.
  • Free of charge.
  • Supports Arm Cortex CPUs, Arm Mali GPUs and the Arm Machine Learning processor.
  • Arm NN for NNAPI accelerates neural networks on Android devices.


Scalable and efficient second-generation ML inference processor.
  • 2x faster inference with 40% lower bandwidth, 25% increased efficiency.
  • Multiple markets from 1 to 10 TOP/s and up to 90 unique configurations.
  • Develop once, deploy anywhere with online and offline compilation.


Neoverse N3

Performance-per-watt optimized for hyperscale, 5G, enterprise networking, and infrastructure edge workloads.
  • 20% greater performance-per-watt efficiency compared to Neoverse N2.
  • 2MB L2 cache option offers nearly 3x performance gains on ML workloads.

Neoverse V3

The first Armv9.2 Neoverse CPU to support the Arm Confidential Compute Architecture.
  • Highest single-thread performance for cloud, HPC, and AI/ML workloads.
  • Supports up to 3MB private L2 cache per core.
  • The perfect foundation for AI accelerator development.

Neoverse V3AE

First Armv9.2 Neoverse CPU with safety enhancements for automotive markets. 
  • Highest single-thread performance for AI/ML workloads and automotive markets.
  • Supports up to 3MB L2 cache per core.
  • Performance to meet the needs of complex workloads for autonomous vehicles and advanced driver-assistance systems in future generations of software-defined vehicles.

Neoverse V2

A New Benchmark for Cloud Computing, HPC, and ML Performance.
  • With an enhanced pipeline and up to 2MB L2 cache per core, Neoverse V2 can deliver 2x the performance of Neoverse V1 on cloud and ML applications.
  • Arm's first V-series core with Armv9 features like memory tagging extension (MTE) and performance defined power (PDP).

Neoverse V1

A performance-first tier targeting HPC, HPC in the Cloud and AI/ML-accelerated applications.
  • Arm’s first SVE implementation for the HPC market, with 2x floating and 4x ML uplift over Neoverse N1.
  • Expands market-leading performance with 50% IPC uplift over Neoverse N1.

Neoverse N2

Leading performance efficiency for cloud-to-edge infrastructure.
  • Market leading scalability and versatility.
  • Significant 40% IPC performance improvement over Neoverse N1.
  • Armv9 introduces key features for performance (SVE2) and security (MTE).

Neoverse N1

Accelerating the transformation to a scalable cloud to edge infrastructure.
  • Revolutionary compute performance.
  • Platform features specific to infrastructure.
  • Designed for extreme range of scale and diversity of compute.

Neoverse E1

Empowering the infrastructure to meet next-generation throughput demands.
  • Intelligent design for highly efficient throughput. 
  • Fully leverages diverse Arm software ecosystem. 
  • Highly scalable throughput for edge-to-core data transport.



High performance processor with low dynamic power.
  • Combines benefits of the Cortex-M3 processor with enhanced security features.
  • Designed primarily for tamper resistant smart cards.
  • Embeds counter measures against side channel attacks and fault injections.


Designed specifically for the highest volume smartcard and embedded security applications.
  • Combines benefits of the Cortex-M0 processor with enhanced security features.
  • Upward compatible with SC300 processor.
  • Extensive ecosystem of embedded tools, software and knowledgebase.
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