First-Generation Armv9 “big” Cortex CPU Based on Arm DynamIQ Technology
Cortex-A710 provides the best balance of performance and efficiency through enhanced micro-architectural features designed in a power efficient manner. Cortex-A710 can be paired with the Cortex-X2 and Cortex-A510 in a big.LITTLE configuration, with a DynamIQ Shared Unit (DSU-110) as part of a Total Compute solution.
Features and Benefits
Draws on efficiency optimizations of all aspects of the microarchitecture to be 30% more power efficient than Cortex-A78.
Provides a 10% uplift in performance compared to Cortex-A78.
Based on Armv9 architecture for mobile computing and introduces key features for performance, power efficiency, and security: Scalable Vector Extension version two (SVE2) and Memory Tagging Extension (MTE).
Product Specifications and Key Documentation
|Neon / Floating Point Unit||Included|
|Max number of CPUs in cluster||Eight (8)|
| Physical addressing (PA)
|Memory system and external interfaces||L1 I-Cache / D-Cache||32KB or 64KB|
|L2 Cache||256KB or 512KB|
|L3 Cache||Optional, 256KB to 16MB|
|Bus interfaces||AMBA AXI5 or CHI.E|
|Other||Security||TrustZone, Secure EL2|
|Interrupts||GIC interface, GICv4.1|
|Embedded Trace Extension||ETEv1.0|
|Trace Buffer Extension||Yes|
Where Innovation and Ideas Come to Life
As one of the most prolific pieces of technology, smartphones are the world's dynamic personal computers, connecting more than 4 billion people in immersive experiences. Arm develops the CPU technology that powers everything on a smartphone.
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The perfect blend of performance and efficiency. Learn how the Cortex-A710 can create a better user experience for your products.
Explore More Options and Features
As the first-generation Armv9 high-efficiency CPU based on Arm DynamIQ technology, Cortex-A510 strikes the perfect balance of performance and efficiency.
Provide the ultimate user experience for entertainment and visual applications across a wide range of smartphone devices.
Arm System IP enables system designers to configure and build high-performance, power-efficient SoCs, while further differentiating with Arm processors and their own IP elements. System IP is integrated via industry-standard AMBA interfaces.
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