Why choose Neoverse CSS V3
Accelerate cloud and data center roadmaps
Start with a pre-validated subsystem to deliver Neoverse V3–based silicon faster.
Deliver performance and efficiency at scale
Built on Neoverse V3 and CMN S3 for scalable, high-throughput AI, cloud, and HPC workloads.
Chiplet ready Design for modular systems
Provides a reusable foundation with native chiplet support for flexible, evolving silicon designs.
Benefits
Purpose-built performance for AI and HPC
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Shorter development cycles:
Neoverse CSS V3 delivers a prevalidated compute subsystem that reduces integration effort and lowers program risk.
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Scalable performance for demanding workloads:
Designed for high core counts, large memory, and high-bandwidth I/O, CSS V3 supports cloud, HPC, and data-intensive workloads without re-architecture.
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Lower system and operational cost:
Greater efficiency and faster time to market reduce costs across silicon development, deployment, and data center operations.
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Flexibility for differentiated innovation:
Chiplet-based and multi-die support enables custom accelerators and system IP on a reusable compute foundation.
Inside Neoverse CSS V3
The building blocks of Arm Neoverse CSS V3
Neoverse CSS V3 is available in configurations that scale to high core counts, large memory capacity, and high-bandwidth I/O, enabling demanding cloud and AI workloads.
Scalable compute for AI
Configure high-core-count Neoverse V3-based designs with generous memory bandwidth and high-throughput I/O to match your cloud and AI workload requirements.
Flexible chiplet-based architectures
Use high-speed die-to-die connectivity to build chiplet and multi-die architectures, allowing flexible combinations of CPUs, accelerators, and I/O.
Secure multi-tenant platforms
Take advantage of Arm security and virtualization technologies, including support for confidential VMs to build secure, multi-tenant cloud and AI platforms.
Use cases
Where innovation and ideas come to life
Cloud computing
Neoverse CSS V3 underpins cloud infrastructure platforms that demand high throughput, efficiency, and scalability for general-purpose and AI-assisted workloads.
High-performance computing (HPC)
Neoverse CSS V3 enables sustained performance for compute-intensive HPC applications through scalable cores, memory bandwidth, and vector processing capabilities.
Artificial intelligence
By integrating high-performance CPUs with custom accelerators, CSS V3 supports AI training and inference workloads that require efficient data movement and compute balance.
Product deep dive
Explore the technical details of the Arm AGI CPU, from individual CPU cores to rack-scale economics and server providers.
Success stories
Partner innovation on Arm Neoverse CSS V3
Microsoft Azure Cobalt 200 for Cloud Computing
NeuReality Redefines the AI Head Node with Arm Neoverse V3
Resources
Latest news and resources
- News and Blogs
Key takeaways
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Neoverse CSS V3 simplifies infrastructure SoC development by integrating Arm Neoverse cores, coherent mesh interconnect, memory controllers, and system IP into a pre-validated compute subsystem.
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It accelerates time to market by reducing the design and validation burden for Arm partners, enabling faster deployment of high-performance infrastructure solutions.
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The platform supports AI, cloud, and 5G workloads through scalable, high-throughput compute and memory architectures based on Armv9 cores and CMN-700 interconnect.
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Pre-integrated software support enables immediate development with firmware, drivers, and reference implementations optimized for the Neoverse platform.
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Arm offers ecosystem enablement and partner resources including design services and validation tools, ensuring successful system integration and performance optimization.
FAQs
What is Arm Neoverse CSS V3, and how is it different from previous generations?
Arm Neoverse CSS V3 is a pre-validated compute subsystem built on the Arm Neoverse V3 CPU, part of the Armv9.2-A architecture family. It delivers a 50% performance-per-socket uplift over CSS N2 systems while reducing time-to-market for partners with a ready-to-integrate subsystem.
Unlike traditional IP cores, CSS V3 combines compute, memory, I/O, and system IP in a single verified design, allowing silicon partners to focus on differentiation rather than platform integration.
What kind of performance improvements does CSS V3 deliver?
CSS V3 introduces major performance uplifts across key workloads:
- +96% in machine learning
- +16% in relational database workloads
- +9% in cryptography
- +12% in general integer performance
It supports up to 64 Neoverse V3 cores per subsystem, up to 12 DDR5/LPDDR5 memory channels, and 64 lanes of PCIe Gen5 or CXL I/O, enabling high throughput for AI inference, HPC, and data analytics.
What markets and workloads are CSS V3 designed for?
CSS V3 targets AI-optimized cloud infrastructure, data center compute, and HPC applications that require sustained performance and scalability. It’s also designed for custom silicon implementations, helping hyperscalers, cloud providers, and semiconductor partners accelerate chip development for AI, analytics, and confidential computing.
How does CSS V3 enable chiplet and multi-die designs?
CSS V3 is built with chiplet scalability in mind. It supports UCIe 1.1 and custom PHYs for die-to-die connectivity and integrates seamlessly with Arm Chiplet System Architecture (CSA), ensuring interoperability between chiplets. This makes CSS V3 ideal for partners building multi-chiplet systems with heterogeneous compute and accelerators.
How does CSS V3 improve total cost of ownership (TCO)?
CSS V3 is designed for TCO optimization through performance efficiency, faster time to market, and simplified design integration. By offering a validated subsystem, partners can reduce development costs, lower risk, and shorten design cycles. Its confidential compute and RAS/telemetry features further improve reliability and data center utilization efficiency.