A scalable and highly configurable packetized Network-on-Chip (NoC) with a 30 percent wire count reduction compared to a traditional crossbar. Supports multiple clock and power domains and up to 1GHz+ operation.
Fully configurable, hierarchical, low latency, low power connectivity for AMBA 4 AXI4, AXI3, AHB-Lite and APB interfaces. Also, scalable for multiple applications from simple single core designs or as a companion to CoreLink CCI and CCN coherent interconnects.
Includes NIC-400 features, plus a library of key interconnect IP for building a scalable and configurable network interconnect, and tooling automation flow using CoreLink Creator to accelerate configuration, and more.
With its harvesting flows and enhanced tooling environment, CoreLink Creator provides significant improvements to configure NICs to decrease time to market.
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Neoverse Processors
Cloud service providers, carriers, system designers and others are turning to Arm Neoverse to build 5G networks, hyperscale datacenters, and high performance computing (HPC) systems. Arm Neoverse delivers leading performance and scalability while dramatically reducing power consumption and total cost of ownership (TCO).
CoreLink Cache Coherent Interconnect
Hardware-managed cache coherency is required to enable big.LITTLE processing to choose the right processor for the right job. The Arm CoreLink CCI series has been designed into many applications, including mobile, tablet, digital TV, set top box, automotive, and low-cost infrastructure.
Cortex Processors
Arm processors include the ultra-low power Cortex-M series, real-time response Cortex-R series, and the high performance Cortex-A series.
System Memory Management Units
A system memory management unit (SMMU) is responsible for all aspects of memory management, including caching and memory virtualization.
Interrupt Controllers
Arm generic interrupt controllers (GIC) perform critical tasks of interrupt management, prioritization and routing.
