The Arm CoreLink CCI-550 Cache Coherent Interconnect
The Arm CoreLink CCI-550 Cache Coherent Interconnect provides full cache coherency between big.LITTLE processor clusters, Mali GPU, and other agents such as network interfaces or accelerators. It can support up to six AXI Coherency Extensions (ACE) and six memory interfaces for the efficient movement of data.
Features and Benefits
One to six ACE ports means CoreLink CCI-550 supports a fully coherent GPU to simplify software development. Hardware coherency enables shared virtual memory and removes the need for time-consuming software-managed cache maintenance.
The CoreLink CCI-550 has been designed, tested, and optimized with the latest Arm technology, including the Cortex and Mali processor series, and CoreLink system IP.
Highly scalable configuration serves a wide range of applications from premium tablet down to smaller, cost-sensitive designs.
Microarchitecture for the CoreLink CCI-550 snoop filter provides a 2x snoop hit for bandwidth that extends efficiency across the system.
Where Innovation and Ideas Come to Life
Arm technology is used in various applications throughout the car including Advanced driver-Assistance Systems (ADAS) and autonomous driving.
Talk with an Expert
A trusted interconnect solution must work for multiple applications and result in an improved user experience. Talk to an Arm expert about the highest efficiency coherent interconnect to do the job.
Explore More Options and Features
Arm processors include the ultra-low power Cortex-M series, real-time response Cortex-R series, and the server-class Cortex-A series.
Graphics and Multimedia
Arm Mali media IP offer high-performing, energy-efficient media processing across a large and growing number of mobile and consumer devices, including smartphones, tablets, TVs and wearables.
CoreSight Debug and Trace
Arm CoreSight technology is a set of tools that can be used to debug and trace software that runs on Arm-based SoCs.
The Arm family of Dynamic Memory Controllers manage the differing demands of multiple processing elements while delivering maximum DRAM bandwidth.
System Memory Management Units
A system memory management unit (SMMU) is responsible for all aspects of memory management, including caching and memory virtualization.
Arm generic interrupt controllers (GIC) perform critical tasks of interrupt management, prioritization and routing.
Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.