The Arm CoreLink CCI-500 Cache Coherent Interconnect
The Arm CoreLink CCI-500 extends the performance and low-power leadership of Arm mobile systems. It provides full cache coherency between big.LITTLE processor clusters and provides I/O coherency for other components such as Mali GPU, network interfaces or accelerators. CoreLink CCI-500 offers a scalable and configurable interconnect which enables SoC designers to meet the performance goals with the smallest possible area and power.
As premium mobile devices require higher resolution screens, the CoreLink CCI-500 offers up to twice the peak system bandwidth compared to the CoreLink CCI-400.
The CoreLink CCI-500 includes end-to-end protection for Ultra-HD media content, between memory, Mali GPU, video processors and display.
CoreLink CCI-500 can offer more than a 35 percent processor memory performance increase compared to CoreLink CCI-400 due to its enhanced microarchitecture with snoop filter.
Part of a complete suite of system IP from Arm that includes CoreLink NIC-400 network interconnect for low power, low latency, end to end connectivity to the rest of the SoC, CoreLink MMU-500 System MMU for virtualization of memory and CoreLink GIC-500 for management of interrupts across multiple processor clusters.
Arm technology is used in various applications throughout the car including Advanced driver-Assistance Systems (ADAS) and autonomous driving.
A trusted interconnect solution must work for multiple applications and result in an improved user experience. Talk to an Arm expert about the highest efficiency coherent interconnect to do the job.
Arm processors include the ultra-low power Cortex-M series, real-time response Cortex-R series, and the server-class Cortex-A series.
Graphics and Multimedia
Arm Mali media IP offer high-performing, energy-efficient media processing across a large and growing number of mobile and consumer devices, including smartphones, tablets, TVs and wearables.
CoreSight Debug and Trace
Arm CoreSight technology is a set of tools that can be used to debug and trace software that runs on Arm-based SoCs.
The Arm family of Dynamic Memory Controllers manage the differing demands of multiple processing elements while delivering maximum DRAM bandwidth.
System Memory Management Units
A system memory management unit (SMMU) is responsible for all aspects of memory management, including caching and memory virtualization.
Arm generic interrupt controllers (GIC) perform critical tasks of interrupt management, prioritization and routing.