Low-Latency and High-Bandwidth Printf-Style Debug
The Arm CoreSight System Trace Macrocell (STM) is a trace source that enables real-time software instrumentation with no impact on system behavior or performance. It extends the low-cost real-time visibility of software and hardware execution to all software developers, enabling rich, optimized and low power software on Arm processor-powered devices across the whole supply chain. The STM-500 is for 64-bit systems and backward compatible to 32-bit.
System-level visibility is important during development. Find out how CoreSight STM helps reduce latency and increase throughput.
Arm processors range from ultra-low power Cortex-M series to server-class Cortex-A series.
Graphics and Multimedia
Arm Mali media IP offer high-performing, energy-efficient media processing across a large and growing number of mobile and consumer devices, including smartphones, tablets, TVs and wearables.
The Arm family of Dynamic Memory Controllers manage the differing demands of multiple processing elements while delivering maximum DRAM bandwidth.
Socrates System Builder
The Arm Socrates System Builder tool guides a user through the selection, configuration and creation of Arm IP, and system assembly to quickly and easily build Arm-based systems.
Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.
- Technical Reference Manual
- CoreSight Technical Introduction
- CoreSight SoC enabling efficient design of custom debug and trace subsystems for complex SoCs
- Better Trace for better software with CoreSight STM
- Low Pin-count Debug Interfaces for Multi-device Systems
- Taking the fear out of silicon debug
- Video interview with CoreSight tech lead Mark LaVine