ARM-Synopsys Galaxy Reference Methodology
Through the results of an on-going technical collaboration between ARM and Synopsys, ARM® synthesizable processor cores are becoming as easy to deploy as a compiled RAM cell. ARM and Synopsys Professional Services work closely to co-develop the ARM-Synopsys Galaxy™ Reference Methodology (RM), a proven methodology built from best practices for the implementation of ARM cores with Synopsys’ latest tools and flows. This ARM-Synopsys RM is a fully integrated, production proven implementation flow based around Synopsys’ Galaxy Design Platform and is portable across multiple silicon technologies.

Key Productivity Features and Benefits
The ARM-Synopsys RM enables ARM partners to harden ARM synthesizable processor cores quickly with superior quality of results (QoR). It streamlines the process used by designers to target ARM cores to their chosen silicon technologies by reducing the time required to harden and model the core from months to a few days. The RM also enables system-on-chip (SoC) designers to integrate their application-specific cores without having to re-verify – by using industry-standard views and models created accurately during the core hardening process. Designers can use the RM with their own choice of silicon process libraries or take advantage of the included ARM Physical IP library. The assurance and speed of the RM provides ARM’s partners flexibility, predictability and a time-to-market advantage with no compromise in system performance.

Advanced High-performance, Low-power Galaxy Design Techniques
The ARM-Synopsys RM takes full advantage of Synopsys’ latest advanced technologies, including Synopsys’ Design Compiler topographical-based synthesis and IC Compiler’s extended physical synthesis (XPS) power-aware placement for the latest ARM processor cores, ARM Physical IP libraries and Power Management Kits (PMKs), plus top-down multi-voltage(MV) Dynamic Voltage, Frequency Scaling (DVFS) support for ARM11™ family of IEM technology-enabled processor cores. Synopsys latest tool support includes:-
     • Design Compiler®, DesignWare® Library, DFT Compiler and Power Compiler™ for RTL synthesis
     • JupiterXT™ for hierarchical design and power planning
     • Astro™, Astro-Xtalk™, IC Compiler and Physical Compiler® for physical implementation
     • Astro-Rail™, Formality, PrimePower, PrimeTime® SI and Star-RCXT™ for design integrity checking and sign-off
     • TetraMAX™ for ATPG

Availability
The ARM-Synopsys Galaxy RM is an integral part of the standard IP distribution from ARM for all synthesizable processor cores, including the new ARM Cortex™-R4 and is available to all qualified ARM licensees. Please contact your ARM Partner Manager for more details.