ARM1176JZ(F)-S

Enhanced Security and Lower Energy Consumption for Consumer and Wireless applications

The ARM1176JZ-S and ARM1176JZF-S processors are the first to incorporate two new technologies from ARM:

ARM TrustZone Technology
ARM TrustZone provides support within the CPU and platform for building the types of trusted computing environment required to support:

ARM Intelligent Energy Manager (IEM) Technology
IEM is a combined software and hardware technology that dynamically monitors and predicts the performance requirements of multiple applications, and tunes the processor's operating voltage and frequency to match the requirements. IEM reduces the processor's energy consumption by an additional 25% - 50% - extending battery life for portable systems. The IEM-enabled ARM1176JZ-S and ARM1176JZF-S processors include support for the voltage and clock domains required to implement an IEM-enabled system.

Applications:

• Ideal applications processor for connected consumer and wireless devices
• Cell-phones, PDAs, Set-top Box, game consoles etc.

Benefits:

• Enhanced security foundation from ARM TrustZone technology
• Lower energy consumption with ARM Intelligent Energy Management
• ARM-EDA Reference Methodology deliverables significantly reduce the time to generate a specific technology implementation of the core and to generate industry standard views and models.

Features:
Powerful ARMv6 instruction set architecture:

• ARM Thumb instruction set reduces memory bandwidth and size requirements by up to 35%
• ARM Jazelle technology for efficient embedded Java execution
• ARM DSP extensions
• SIMD (Single Instruction Multiple Data) media processing extensions deliver up to 2x performance for video processing
• Enhanced system security foundation
  • ARM TrustZone technology

• Advanced energy management features:
  • Energy saving power-down modes reduce static leakage currents when processor is not in use
  • Intelligent Energy Manager (IEM) technology for dynamic power management

• High performance integer processor:
  • 8-stage integer pipeline delivers high clock frequency
  • Separate load-store and arithmetic pipelines
  • Branch Prediction and Return Stack
  • Up to 675 Dhrystone 2.1 MIPS in 0.13u process

• High performance memory system
  • Supports 4-64k cache sizes
  • Optional tightly coupled memories with DMA for multi-media applications
  • Quad-ported AMBA 3 AXI bus interface speeds instruction and data access
  • ARMv6 memory system architecture accelerates OS context-switch

• Vectored interrupt interface and low-interrupt-latency mode speeds interrupt response and real-time performance

• Optional Vector Floating Point coprocessor (ARM1176JZF-S)
  • Powerful acceleration for embedded 3D-graphics

Core area, frequency range and power consumption are dependent on process, libraries and optimizations. The numbers quoted above are illustrative of synthesized cores using general purpose TSMC process technologies and ARM Artisan standard cell libraries and RAMs.

The speed optimized implementations refer to the library choices and synthesis flow decisions and tradeoffs made in order to achieve the target frequency performance. The area optimized implementations refer to the library choices and synthesis flow decisions and tradeoffs made in order to achieve a target area density.

The cache sizes are specified as InstructionCache/DataCache. The area w/o cache numbers quoted exclude RAM area, but include all logic including memory management, cache control and debug. The area with cache numbers quoted includes the core, the specified instruction and data caches and all necessary RAMs.

Nominal power numbers do not include IEM savings. IEM has been shown to save an additional 25%-50% of the core energy depending on the application.

* Worst case conditions –   90nm process - 0.9V, 125C, slow silicon
† Typical case conditions–  90nm process - 1V, 25C, typical silicon