The Arm CoreLink DMC-620 Dynamic Memory Controller
The Arm CoreLink DMC-620 Dynamic Memory Controller is designed to provide an optimal memory access solution for SoCs deployed in infrastructure applications such as servers, High-Performance Computing (HPC), and networking.
The CoreLink DMC-620 offers support for sophisticated RAS features such as end-to-end data parity protection, corrected data write-back, retry on uncorrectable ECC errors, memory scrubbing, and standardized error reporting.
Low memory latency with high bandwidth use, the CoreLink DMC-620 delivers QoS and high performance for data transfers from SoC to high-density DRAM memory.
CoreLink DMC-620 provides integrated Arm TrustZone Address Space Control (ATASC) with programmable memory access protection. It also supports multiple DRAM standards, addressing up to 1TB of DRAM memory so designers can scale the DRAM footprint of high-end systems.
CoreLink DMC-620 is built on top of a family of silicon-proven DMC products that guarantee interoperability with any DFI-compliant DDR PHY and with JEDEC-compliant DDR4, DDR3, and DDR3L DRAM memory. Deploying CoreLink DMC-620 in your SoC delivers cost savings and helps to accelerate your tape-out.
Automotive
Secure implementation for automotive applications, including parking sensors and much more.
Smart Homes
Connected intelligence across the home, including smart meters, connected lighting, connected appliances, and much more.
Wearables
Power efficient wearables and fitness monitoring, with Arm TrustZone for security around personal wearable data.
Arm has extensive experience optimizing, tuning and validating performance and interoperability for subsystems. Talk to an Arm expert about the right silicon-proven DMC for you.
Cortex Processors
Arm processors range from ultra-low power Cortex-M series to server-class Cortex-A series.
Graphics and Multimedia
Arm Mali media IP offer high-performing, energy-efficient media processing across a large and growing number of mobile and consumer devices, including smartphones, tablets, TVs and wearables.
CoreSight Debug and Trace
Arm CoreSight technology is a set of tools that can be used to debug and trace software that runs on Arm-based SoCs.
Memory Controllers
The Arm family of Dynamic Memory Controllers manage the differing demands of multiple processing elements while delivering maximum DRAM bandwidth.
System Memory Management Units
A system memory management unit (SMMU) is responsible for all aspects of memory management, including caching and memory virtualization.
Interrupt Controllers
Arm generic interrupt controllers (GIC) perform critical tasks of interrupt management, prioritization and routing.
DMC-620 Resources
Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.
Blogs
Specifications