The Arm CoreLink DMC-520 Dynamic Memory Controller
The CoreLink DMC-520 Dynamic Memory Controller provides high bandwidth with low latency access to DDR4 and DDR3 memory in server, networking, and high-performance computing applications. It includes full DIMM support, reliability, availability, and serviceability features, and advanced error correction capabilities required for infrastructure applications.
The system interface includes integrated TrustZone address space control functionality to provide secure memory access.
QoS features reduce average and maximum CPU latency.
CoreLink DMC-520 supports DDR4, an advanced infrastructure-class memory technology. DDR4 provides superior bandwidth (up to 25GB/s per channel for DDR4-3200 Mbps) and low-power features necessary for high-end system deployment.
Automotive
Secure implementation for automotive applications, including parking sensors and much more.
Utilities
Close tracking of utilities, including power and water distribution. Also, road traffic monitoring, including vehicle counting and pollution estimates.
Wearables
Power efficient wearables and fitness monitoring, with Arm TrustZone for security around personal wearable data.
Arm has extensive experience optimizing, tuning and validating performance and interoperability for subsystems. Talk to an Arm expert about the right silicon-proven DMC for you.
Cortex Processors
Arm processors range from ultra-low power Cortex-M series to server-class Cortex-A series.
Graphics and Multimedia
Arm Mali media IP offer high-performing, energy-efficient media processing across a large and growing number of mobile and consumer devices, including smartphones, tablets, TVs and wearables.
CoreSight Debug and Trace
Arm CoreSight technology is a set of tools that can be used to debug and trace software that runs on Arm-based SoCs.
Memory Controllers
The Arm family of Dynamic Memory Controllers manage the differing demands of multiple processing elements while delivering maximum DRAM bandwidth.
System Memory Management Units
A system memory management unit (SMMU) is responsible for all aspects of memory management, including caching and memory virtualization.
Interrupt Controllers
Arm generic interrupt controllers (GIC) perform critical tasks of interrupt management, prioritization and routing.
DMC-520 Resources
Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.
Blogs
Specifications