The Arm CoreLink DMC-520 Dynamic Memory Controller

The CoreLink DMC-520 Dynamic Memory Controller provides high bandwidth with low latency access to DDR4 and DDR3 memory in server, networking, and high-performance computing applications. It includes full DIMM support, reliability, availability, and serviceability features, and advanced error correction capabilities required for infrastructure applications. 

Features and Benefits
Secure Memory Access

The system interface includes integrated TrustZone address space control functionality to provide secure memory access. 

Quality of Service (QoS)

QoS features reduce average and maximum CPU latency.

Advanced Memory Technology

CoreLink DMC-520 supports DDR4, an advanced infrastructure-class memory technology. DDR4 provides superior bandwidth (up to 25GB/s per channel for DDR4-3200 Mbps) and low-power features necessary for high-end system deployment.

Use Cases
Where Innovation and Ideas Come to Life

Secure implementation for automotive applications, including parking sensors and much more.

Talk with an Expert

Arm has extensive experience optimizing, tuning and validating performance and interoperability for subsystems. Talk to an Arm expert about the right silicon-proven DMC for you.

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DMC-520 Resources

Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.

 

Blogs

Specifications

 

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