The Arm CoreLink DMC-500 Dynamic Memory Controller
The CoreLink DMC-500 Dynamic Memory Controller provides power-efficient access to LPDDR4 and LPDDR3 memory in mobile, consumer, and embedded designs. The DMC-500 delivers superior, and fast data transfer features.
Arm has extensive experience optimizing, tuning and validating performance and interoperability for subsystems. Talk to an Arm expert about the right silicon-proven DMC for you.
Arm processors range from ultra-low power Cortex-M series to server-class Cortex-A series.
Graphics and Multimedia
Arm Mali media IP offer high-performing, energy-efficient media processing across a large and growing number of mobile and consumer devices, including smartphones, tablets, TVs and wearables.
CoreSight Debug and Trace
Arm CoreSight technology is a set of tools that can be used to debug and trace software that runs on Arm-based SoCs.
The Arm family of Dynamic Memory Controllers manage the differing demands of multiple processing elements while delivering maximum DRAM bandwidth.
System Memory Management Units
A system memory management unit (SMMU) is responsible for all aspects of memory management, including caching and memory virtualization.
Arm generic interrupt controllers (GIC) perform critical tasks of interrupt management, prioritization and routing.
Everything you need to know to make the right decision for your project. Includes technical documentation, industry insights, and where to go for expert advice.
- DMC-PHY Integration Blog
- It's (Mostly) In The PHY
- CoreLink System IP Enables Heterogeneous Processing
- AMBA Specifications