ARM The Architecture For The Digital World  

AMBA System Controllers

AMBA System Controllers Image (View Larger AMBA System Controllers Image) AMBA® Controllers for Level 2 CacheDMA and Interrupt are low-power, high-performance IP cores that perform critical tasks within the AMBA system.  Designed for optimal compatibility with ARM processorsmultimedia and System IP, they are the natural compliment to the Interconnect and Memory Controller product lines. 
 


AMBA Controllers for Cache, DMA and Interrupt Handling

Level 2 Cache Controllers

CPU to off-chip memory communication has become the performance bottleneck in many SoC.  Level 2 Cache Controllers improve CPU performance by keeping memory access on-chip with a typical latency 10-25% of accessing the data off-chip.  At the same time the reduced CPU demands on the off-chip memory bandwidth free up that resource for other masters. 

Level 2 Cache Controllers also contribute significantly to power efficiency as on-chip accesses are typically an order of magnitude lower in power versus going off-chip.

AMBA Level 2 Cache Controllers can either be embedded in the CPU or delivered as standalone components.  In either case they are designed alongside the CPU to match the processor's requirements and easily integrate into AXI or AHB interconnects.

DMA Controllers

Efficient use of DMA can significantly improve system performance in multiple dimensions.  for example using a DMA controller can offload a CPU thereby either reducing power or boosting CPU performance (or a combination of both).

The AMBA DMA Controllers have been designed to complement both high-end and energy efficient systems.  They provide a centralised DMA processing capability that is high performance and highly flexible whilst at the same time area efficient.

Interrupt Controllers

AMBA Interrupt Controllers provide an efficient implementation of the ARM Generic Interrupt Specification to work in multi-processor systems with AHB or AXI interfaces.  They are highly configurable to provide the ultimate flexibility in handling a wide range of interrupt sources that can control a single CPU or multiple CPUs.

LCD Controller

A 64-bit Colour LCD Controller (PL111) supporting AHB master and slave interfaces and driving TFT, STN, single and dual panel displays.

TrustZone Controllers

Two system IP blocks to support the ARM TrustZone system-wide approach to security in preventing access to peripherals such as keyboards and screens by malicious software:

  • TrustZone Protection Controller (BP147) controls the security status of peripherals
  • TrustZone Internal Memory Wrapper (BP141) manages a secure region within the memory range

Controllers for AMBA AXI

FunctionProduct CodeDescription
Level 2 Cache ControllerL2C-310High performance Level 2 Cache Controller for Cortex-ACortex-R and ARM11 based designs
DMA ControllerDMA-330 Centralised DMA processing for AXI based designs 
Interrupt ControllerGIC-390 Generic Interrupt Controller for multi-processor AXI and AHB systems 

Controllers for AMBA AHB

Function Product Code Description 
Level 2 Cache Controller L2C-210 Level 2 Cache Controller for ARM9 and ARM1136 based designs 
DMA Controller                DMA-230Highly efficient gate and power optimised DMA Controller for Cortex-M based designs 
PL080/PL0812- and 8-channel DMA Controllers for AHB based designs 
Colour LCD ControllerPL111Colour LCD controller with AHB interface
Interrupt ControllerGIC-390Generic Interrupt Controller for multi-processor AXI and AHB systems 
 PL190/PL192 Interrupt controllers for AHB based designs

 


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