RealView® Core Tiles are a risk free way to add an ARM processor to a hardware prototyping or software development system. The Core Tile for ARM1156T2F-S is a compact development board based on the ARM1156T2F-S test chip, the first silicon to implement the Thumb-2 instruction set. | 
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The test chip can be clocked at a much faster frequency than an FPGA or simulator model and includes a large amount of internal memory, which enables accelerated software development and debug. Together, this Core Tile and the RealView Emulation Baseboard provide an ideal Thumb-2 software development platform. Owing to the similarities between the Cortex-R4 and ARM1156T2F-S processors, the CT1156T2F-S is also the best solution available at the moment for Cortex-R4 software development. By adding RealView Logic Tiles to this system, it becomes a fast platform for AMBA AXI peripheral prototyping on FPGA. Example RTL is provided to use the Core Tile on top of the Emulation Baseboard, which accelerates system prototyping and reduces time to market. Features of the Core Tile for ARM1156T2F-S Single ARM1156T2F-S CPU with VFP and 16KB caches and 64KB TCMs 512KB of internal AXI RAM On chip ETM11CS and ETB11 and external MICTOR trace connector External multiplexed 64-bit AXI interface Tile form factor High density stacking connectors JTAG connection for processor run control and debug (via board below) Power supply to generate the core voltage DACs and ADCs to control the CPU's voltage and measure its power consumption
Stand-alone Operation Core Tiles cannot be used stand-alone. They require a motherboard that provides power and a JTAG connector and implements a memory system. For example, a Core Tile and an Emulation Baseboard can be used together for software development and hardware prototyping. Trace The ARM1156T2F-S test chip contains an Embedded Trace Macrocell (ETM) and an external trace port, which is connected to a MICTOR trace connector on the Core Tile. The test chip also contains an Embedded Trace Buffer (ETB). Please note: Core Tiles use ARM test-chips that are specially fabricated to validate new ARM designs and process technologies. These test-chips are provided by a variety of suppliers in small quantities. All test-chips used on Core Tiles are functionally tested by the manufacturer. However, the characteristics of the test-chips used on Core Tiles may vary for different manufacturing batches. ARM, therefore, cannot guarantee that characteristics including but not limited to clock speeds, cache configurations and TCM configurations will be the same from one Core Tile to the next.
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