Accurate Models, Ready to Run

Operating at up to hundreds of MHz, Fixed Virtual Platforms (FVPs) are pre-configured, functionally accurate simulations of popular system configurations, built with Arm Fast Models. They include all the key components to enable development of large portions of software ahead of hardware availability.

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Features and Benefits
Complete System Simulation

Fixed Virtual Platforms are a great way to start bare metal or OS-hosted software development for Arm without the need for a physical target. With a processor, memory and other peripherals modeled within an FVP, you’ll gain understanding of how Arm IP works from a programmer’s perspective.

Software Head Start 

Fixed Virtual Platforms remove the bottleneck of starting software design only after the hardware is available. With Fixed Virtual Platforms your software engineering team can get started programming the latest Arm IP at the earliest possibly stage, shortening the software development cycle.

Scalable and Automatable

Scripting interfaces make Arm FVPs easily automatable and the perfect choice for continuous integration and validation farms. Virtual prototypes are easier to scale and maintain than their hardware counterparts.

Fully Debuggable 

The Fast Models debug interface enables a virtual connection to the FVPs which are supported by many debug vendors. This interface enables a debug experience consistent between hardware and software targets without changing your debug tools.

Configurable Core Count

Allow users to configure the number of CPU instances in the system – x1, x2, and x4.

Software Included

Some FVPs include compatible, ready-to-run software stacks such as Android and Linux OS. And some FVPs are part of System Guidance bundles - Arm deliverables that include both documentation to guide SoC design and a reference software stack.

Use Case

Accelerated Software Development

Start developing software on the latest Arm-based devices well in advance of hardware availability. Start investigating the latest Arm CPU and System IP prior to silicon availability.

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