The Ultimate in Arm Debug

High performance debug capability, which is ideal when needing fast downloads, adaptive JTAG clock rates, and parallel streaming trace . The DSTREAM-ST has the performance, adaptability-to-target, and broad Arm architecture support required for  faster development.

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Features and Benefits
Broad Arm Architecture Support

Debug and trace designs that are based on Arm architecture versions v4 to v8. Whether it's legacy or the very latest, DSTREAM-ST has it covered.

Built for Arm Tools

DSTREAM and Arm Development Studio were made for each other. Access powerful Development Studio features, like the ability to auto-detect SoC components.

Faster Debug

Finish debugging sooner by leveraging patented technology for super-fast downloads and JTAG clock rates to step through code faster (especially on multiple processors).

More Features
Programmable I/O

Combined with its scripting capabilities, the User I/O port offers 8 digital I/O pins to enable automated testing and validation workflows.

No Vendor Lock-in

Developers can leverage their tools of choice as the product’s flexible architecture can support a wide variety of third-party IP and debuggers.

Connection Flexibility

Includes adapters for JTAG, CoreSight, TI and MIPI connectors for maximum flexibility regardless of the device used.

Fast Host Connectivity

Remote gigabit ethernet access or via USB 3.0 for remote and fast connections.

Complex SoC Support

Works with complex SoC configurations to accelerate development.

Streaming Trace

Stream 4-pin external processor trace. Supported protocols include STM, ITM, ETB, ETM and PTM.

Use Cases
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Learn how DSTREAM-ST can accelerate your SoC development.

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DSTREAM

DSTREAM

Maximum visibility into Arm processors, with 9.6 Gbps parallel trace or 20 Gbps serial trace, 4 GB trace buffer, system auto-detection with DS-5 and a range of target connectors including JTAG, MICTOR and CoreSight.

DStream-HSSTP

DSTREAM-HSSTP

Enables DSTREAM to capture multiple lanes of high speed serial trace in situations where a large amount of trace data is necessary or where SoC termination count rules out parallel trace.

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