RealView® SoC Designer technology is a comprehensive easy-to-use toolset for fast modeling, simulation and debugging of complex system-on-chip (SoC) designs. Its advanced cycle-based modeling paradigm using SystemC interfaces offers unparalleled simulation performance while allowing the highest accuracy. On-the-fly debugging and profiling capabilities make the SoC Designer toolset ideal for system-level architecture exploration and pre-silicon embedded software development.
System and hardware architects use the SoC Designer toolset to pinpoint the optimum architecture quickly and accurately, replacing traditional pen-and-paper calculations. The SoC Designer toolset’s virtual prototypes enable embedded software developers to cut development time by starting the driver and application coding and testing long before the RTL is finalized or chip samples become available.
Hardware and software integrators use the RTL co-simulation capabilities of the SoC Designer toolset to identify and remove bugs early, minimizing the chances for costly chip respins or product recalls. In addition to the extensive library of standard SystemC models, users can choose from a large variety of available processor, peripheral, memory and bus models from ARM, CEVA, Infineon, LSI Logic, MIPS, PMC-Sierra and other vendors. The built-in SystemC component wizard allows users to add new models easily in a simple plug-and-play fashion.
The SoC Designer toolset offers powerful integration options covering popular RTL simulators, embedded software debuggers and algorithmic simulation tools, perfectly fitting into common design flows.
Modeling and Simulation Features - Graphical user interface for interactive system-design, modeling and simulation
- Full SystemC 2.1 language support allows mix-and match of event-driven, cycle-accurate and cycle-approximate models
- Full SPIRIT 1.0 compliance offers an automated flow from block level design to RTL implementation for IP compliant with the IP-XACT specification from The SPIRIT Consortium
- Integrated component wizard offers rapid SystemC model development
- Fast SystemC simulation up to 10 megacycles per second on popular desktop computers
- Save and restore support for efficient OS driver development (subject to model support)
Debugging Features Full visibility of processor resources and execution control through standard debugging API Detailed state visibility with register, memory and disassembly display for any component System level debugging features, including transaction animation, monitoring and breakpoints Multi-core source level software debug support via the debugger in the RealView Development Suite, as well as integration support for third-party software debuggers
Analysis Features
Integrated waveform viewer for tracing of transactions, signals and registers On-the-fly performance profiling views for bus, cache, and other models through generic profiling API Comprehensive C-level software profiling for application performance analysis
Options Model Library of processor, bus, memory and peripheral models of IP from ARM, CEVA, Infineon, LSI Logic, MIPS, PMC-Sierra and other vendors Automatic generation of VHDL and Verilog Co-Simulation wrappers for use with popular RTL simulators from Cadence and Mentor MATLAB/Simulink integration for unified algorithm and system development Esterel Studio integration for support of formal design entry for a unified flow from complex state machines to system development
Supported Platforms |
