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SoC Design/Microprocessors in FPGAs Development Boards for Educators

 

The ARM University Program recommends the following development boards for teaching SoC Design:

You can purchase these boards from Digikey

Accompanying teaching materials can be requested here

Board

Main Features

Other Features

ZYBO Zynq-7000 Development Board

  • 650Mhz dual-core Cortex-A9 processor
  • DDR3 memory controller with 8 DMA channels
  • High-bandwith peripheral controllers: 1G Ethernet, USB 2.0, SDIO
  • Low-bandwidth peripheral controller: SPI, UART, I2C
  • Reprogrammable logic equivalent to Artix-7 FPGA
  • 28K logic cells
  • 240KB Block RAM
  • 80 DSP slices
  • On-chip dual channel,
  • 12-bit, 1 MSPS analog-to-digital converter (XADC)
  • ZYNQ XC7Z010-1CLG400C
  • 512MB x32 DDR3 w/ 1050Mbps bandwidth
  • Dual-role (Source/Sink) HDMI port
  • 16-bits per pixel VGA output port
  • Trimode (1Gbit/100Mbit/10Mbit) Ethernet PHY
  • MicroSD slot (supports Linux file system)
  • OTG USB 2.0 PHY (supports host and device)
  • External EEPROM (programmed with 48-bit globally unique EUI-48/64™ compatible identifier)
  • Audio codec with headphone out, microphone and line in jacks
  • 128Mb Serial Flash w/ QSPI interface
  • On-board JTAG programming and UART to USB converter
  • GPIO: 6 pushbuttons, 4 slide switches, 5 LEDsSix Pmod connectors (1 processor-dedicated, 1 dual analog/digital)

Nexys4 Artix-7 FPGA Board

  • 15,850 logic slices, each with four 6-input LUTs and 8 flip-flops
  • 4,860 Kbits of fast block RAM
  • Six clock management tiles, each with phase-locked loop (PLL)
  • 240 DSP slices
  • Internal clock speeds exceeding 450MHz
  • On-chip analog-to-digital converter (XADC)
  • 16 user switches
  • USB-UART Bridge
  • 12-bit VGA output
  • 3-axis accelerometer
  • 16Mbyte CellularRAM
  • Pmod for XADC signals
  • 16 user LEDs
  • Two tri-color LEDs
  • PWM audio output
  • Temperature sensor
  • Serial Flash
  • Digilent USB-JTAG port for FPGA programming and communication
  • Two 4-digit 7-segment displays
  • Micro SD card connector
  • PDM microphone
  • 10/100 Ethernet PHY
  • Four Pmod portsUSB HID Host for mice, keyboards and memory sticks

Altera DE0-CV Board

 

  • Cyclone V 5CEBA4F23C7N Device
  • 49K Programmable Logic Elements
  • 3080 Kbits embedded memory
  • PS/2 mouse/keyboard
  • Two 2x20 GPIO Header
  • 64MB SDRAM, x16 bits data bus
  • SD memory card slot
  • 4-bit Resistor VGA
  • 10 LEDs
  • 10 Slide Switches
  • 4 Debounced Push Buttons
  • 1 CPU reset Push Buttons
  • Six 7-Segments

Altera DE1-SoC Board

 

  • Cyclone V SoC 5CSEMA5F31C6 Device
  • Dual-core ARM Cortex-A9 (HPS)
  • 85K Programmable Logic Elements
  • 4,450 Kbits embedded memory
  • Two Port USB 2.0 Host (ULPI interface with USB type A connector)
  • USB to UART (micro USB type B connector)
  • 10/100/1000 Ethernet
  • PS/2 mouse/keyboard
  • IR Emitter/Receiver
  • 64MB (32Mx16) SDRAM on FPGA
  • 1GB (2x256Mx16) DDR3 SDRAM on HPS
  • Micro SD Card Socket on HPS
  • 24-bit VGA DAC
  • 4 User Keys (FPGA x4)
  • 10 User switches (FPGA x10)
  • 11 User LEDs (FPGA x10 ; HPS x 1)
  • 2 HPS Reset Buttons (HPS_RST_n and HPS_WARM_RST_n)
  • Six 7-segment displays
  • 24-bit CODEC, Line-in, line-out, and microphone-in jacks
  • TV Decoder (NTSC/PAL/SECAM) and TV-in connector
  • 1 MSPS, 8 channel 12-bits ADC
  • G-Sensor on HPS

Juno ARM Development Platform

Available here

 

  • ARM® Cortex®-A72 or ARM® Cortex®-A57 and Cortex-A53 MPCore for ARMv8 big.LITTLE™
  • Mali™-T624 for 3D Graphics Acceleration and GP-GPU compute
  • 4 lane Gen 2.0 PCI-Express (Juno r1 and r2 only)
  • A SoC architecture aligned with Level 1 (Server) Base System Architecture
 


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