Introduction to Computer Architecture
You can download the materials by clicking the button below which will take you to Arm Education's official GitHub pages.
Teach your students the fundamental concepts of computer architecture and how these concepts are applied and implemented in modern processors. This kit is suitable for introductory and mid-level computer architecture courses in Electronic and Computer Engineering, and Computer Science.
- A full set of lecture slides, ready for use in a typical 10-12 week undergraduate course (see full syllabus).
- Lab manual with solutions for faculty are available upon request from here. The labs are based on a simple 5-stage processor for education purposes called the Arm Education Core, which is written in Verilog and can run a subset of the Armv8-A Assembly instructions. These labs provide a full hands-on experience of demonstrating and implementing Computer Architecture concepts such as pipelining, forwarding paths, stalls, control hazard solution using the Arm Education Core.
- The EULA covering the use of Arm Education Core can be found here.
- Prerequisites: Digital electronics, basics of hardware description language (Verilog), and familiarity with basic Assembly programming.
To produce students with knowledge of the fundamental topics and concepts of computer architecture including the application of these with modern Arm processors.
- Knowledge and understanding of
- The fundamentals of computer design including a simple processor and instruction set architecture, and outline key features of Arm instruction set architectures.
- The component functions, benefits and drawbacks of a superpipelined and superscalar processor in computer architecture design.
- The function, types, and hierarchies of memory in computer architecture design.
- The purpose, function, types and performance classifications of a cache in computer architecture design.
- The function of multicore processors including the related concepts of multicore communication, cache coherence and memory consistency.
- The function, benefits and drawbacks of multithreading including the related concepts of multitasking, fine-grained multithreading, coarse-grained multithreading and simultaneous multithreading.
- The function and benefits of data-level parallelism as a computer architecture choice including vector processors, Single Instruction, Multiple Data (SIMD) and Graphics Processing Units (GPUs).
- Describe what is meant by 'computer architecture' and discuss historical and future computer architecture trends.
- Explain the implementation of basic processor pipelining including assessing hazards and performance.
- Explain the implementation of advanced processor pipelining including branch handling, handling exceptions and the limitations of pipelining.
- Explain the building blocks, main features, design considerations and benefits of modern System-on-Chip (SoC) design.
- Utilize tool commands and example code to ensure successful set up of software tools for the labs including Icarus Verilog, GNU Toolchain for the A-profile Architecture (contains GCC compiler), and GTKWave.
- Write assembly code using a subset of Armv8-A AArch64 instructions and simulate on a simple processor called the Arm Education Core.
- Categorize the encodings of a subset of the Armv8-A instruction into specific fields to interpret instruction operations.
- Demonstrate the functionality and behavior of key components in the Instruction Fetch and Instruction Decode stages using the Arm Education Core.
- Demonstrate the functionality and operation of key components in the Execution, Memory Access, and WriteBack stages using the Arm Education Core.
- Implement a simple pipeline using the Arm Education Core.
- Implement forwarding paths to resolve Read-After-Write (RAW) data hazards using the Arm Education Core.
- Implement a stall and control hazard solution using the Arm Education Core, and estimate Power, Performance, and Area.
|1||An Introduction to Computer Architecture|
|2||Fundamentals of Computer Design|
|4||Branches and Limits to Pipelining|
|5||Exploiting Instruction-Level Parallelism|
|10||Vector, SIMD, GPUs|
|11||SoC Case Study|