SoC and CPU System-Wide Approach to Security
Arm TrustZone technology is a System on Chip (SoC) and CPU system-wide approach to security. TrustZone is hardware-based security built into SoCs by semiconductor chip designers who want to provide secure end points and a device root of trust. The family of TrustZone technologies can be integrated into any Arm Cortex-A and the latest Cortex-M23 and Cortex-M33 based systems, from the smallest of microcontrollers, with TrustZone for Cortex-M processors, to high-performance applications processors, with TrustZone technology for Cortex-A processors.
At the heart of the TrustZone approach is the concept of secure and non-secure worlds that are hardware separated, with non-secure software blocked from accessing secure resources directly. Within the processor, software either resides in the secure world or the non-secure world; a switch between these two worlds is accomplished via software referred to as the secure monitor (Cortex-A) or by the core logic (Cortex-M). This concept of secure (trusted) and non-secure (non-trusted) worlds extends beyond the processor to encompass memory, software, bus transactions, interrupts and peripherals within an SoC.
An overview of TrustZone technology is presented on the diagram on the right: the two processor family profiles offer the same security concepts, but with a totally different implementation. TrustZone technology provides a foundation for system-wide security and the creation of a trusted platform. Any part of the system can be designed to be part of the secure world, including debug, peripherals, interrupts and memory. By creating a security subsystem, assets can be protected from software attacks and common hardware attacks.
TrustZone Technology for Application Processors (Cortex-A)
TrustZone technology within Cortex-A based application processors is commonly used to run trusted boot and a trusted OS to create a Trusted Execution Environment (TEE). Typical use cases include the protection of authentication mechanisms, cryptography, key material and Digital rights management (DRM). Applications that run in the secure world are called Trusted Apps.
The partitioning of the two worlds is achieved by hardware logic present in the AMBA bus fabric, peripherals and processors. Each physical processor core has two virtual cores: one considered secure and the other non-secure and a robust mechanism is provided to context switch between them (Secure Monitor exception). The entry to the secure monitor can be triggered by software executing a dedicated Secure Monitor Call (SMC) instruction or by a number of exception mechanisms. The monitor code typically saves the state of the current world and restores the state of the world it’s being switched to.
In order to implement a secure world in the SoC, trusted software (Trusted OS) needs to be developed to make use of the protected assets. This code typically implements trusted boot, the secure world switch monitor, a small trusted OS and trusted apps. Multiple levels of secure world privileges are provided for isolation between trusted boot, trusted OS and trusted apps. The combination of TrustZone based hardware isolation, trusted boot and a trusted OS make up a Trusted Execution Environment (TEE). The TEE offers the security properties of confidentiality and integrity to multiple Trusted Apps. Many TEE providers follow GlobalPlatform’s API standard to enable their TEE to deliver a common security capability across platforms and markets. A protection profile has been written by GlobalPlatform for TEEs and a security evaluation scheme developed that can be used by partners who want to gain security certification from an independent test laboratory.
Arm Trusted Firmware
SoC developers and OEMs can benefit from a reference implementation of low-level secure world software known as Arm Trusted Firmware.
This software is available as open source on GitHub and includes trusted boot and a secure runtime that takes care of the switching between the non-secure (non-trusted) and secure (trusted) worlds using Secure Monitor Code Calling Convention (SMCCC). Arm Trusted Firmware can be integrated with a commercial or open source trusted OS to create a TEE.
To aid the system designer in creating a TrustZone based TEE, Arm has created a number of documents, reference software and training courses. These documents include:
- Trusted Base System Architecture (TBSA)
- Trusted Board Boot Requirements (TBBR)
- TrustZone Media Protection Architecture (TZMP)
TrustZone Technology for Microcontrollers (Cortex-M)
Armv8-M architecture extends TrustZone technology to Cortex-M class systems enabling robust levels of protection at all cost points. TrustZone for Armv8-M has the same high-level features as TrustZone on applications processors with the key benefit that context switching between secure and non-secure worlds is done in hardware for faster transitions and greater power efficiency. There is no need for any secure monitor software.
TrustZone for Armv8-M is an ideal technology to use with the Platform Security Architecture (PSA) as it provides hardware isolation between the normal code and the trusted code base. It also provides a mechanism to provide trusted hardware that might include hardware backed secure storage, Random Number Generators (RNG) and a source of secure time.
Embedded software developers enhance their productivity by developing TrustZone systems using C language while maintain the existing programmer’s model for the non-secure side. Debug operations are also supported with sensitivity to access to the secure vs the non-secure states.
TrustZone for Cortex-M is used to protect firmware, peripheral and I/O, as well as provide isolation for secure boot, trusted update and root of trust implementations while providing the deterministic real-time response expected for embedded solutions.
Discover more technical information on TrustZone for Armv8-M