Architecture Fundamentals and Advanced Features
This guide introduces the Arm R-profile architecture. You will learn about the Arm architecture, the evolution of the R-profile, and the features in all R-profile versions.
This guide is intended to provide a single guide for developers writing programs for Cortex-R series processors.
This guide introduces the exception and privilege model in AArch64. It covers Exception Levels - EL0, EL1, EL2, EL3 - synchronous and asynchronous exceptions, including interrupts - Serror, IRQ, FIQ - and virtual exceptions.
This learn the architecture guide introduces the A64 instruction set, which is used in AArch64.
This guide provides an overview of the Generic Interrupt Controller (GIC), describing the operation of an Arm GICv3 compliant interrupt controller, and providing information about configuration for use in a bare metal environment.
This guide describes the support for virtualization in the GICv3 and GICv4 architecture. It covers the controls available to a hypervisor for generating and managing virtual interrupts.
This guide introduces Locality-specific Peripheral Interrupts (LPIs), a type of interrupt introduced in GICv3/v4.
This guide introduces the Arm Generic Timer; the timer framework for R-profile PEs.
This guide introduces virtualization concepts and possibilities in the Armv8-R architecture.
This guide introduces Arm Neon technology, the Advanced SIMD (Single Instruction Multiple Data) architecture extension for implementations of Armv8–R.
This guide shows you how to use Arm Neon intrinsics in your C, or C++, code to take advantage of the Advanced SIMD technology in the Armv8-R architecture.
This guide shows how to use the auto-vectorization features in Arm Compiler 6 and CLANG to automatically generate code that contains Armv8-R Advanced SIMD instructions.
This series of guides introduces Neon, shows you how to optimise C code using intrinsics, and how to use your compiler to automatically generate code that contains Armv8-R advanced SIMD instructions.