Leading Implementation Solution for Cortex-A Processors

Arm POP IP is the bridge between Cortex-A CPU and silicon process technology. A highly optimized physical IP solution for the Cortex-A processor series, it offers a proven high-performance or high-density implementation solution, within a given power envelope, that helps lower technical and project risk.

Features and Benefits

Lower the Risk of Implementation

At smaller process nodes, voltage drop and variation present new challenges. Reference scripts from POP IP and optimized Artisan physical IP help designers overcome most implementation challenges.

Offer Flexible Configurations

POP IP gives users wide flexibility to run reference flows in various configurations. POP IP is available across foundries for multiple Arm cores with support for the latest EDA tool flows.

Accelerate Time-to-Market

POP IP’s core-hardening acceleration capabilities and Artisan products ease implementation challenges and provide differentiation for the underlying IP.

Provide Predictable PPA

POP IP and Artisan physical IP are developed in conjunction with the core, processor and implementation teams. This insight helps deliver accurate power, performance and area (PPA) goals.

Optimized Core Implementation

A comprehensive benchmarking report documents the exact conditions and results Arm achieved for the core implementation across an envelope of configuration and design targets.

Support for EDA Vendors

All POP packages include a comprehensive RTL-GDS flow that supports major electronic design automation (EDA) vendors.

DesignStart Tier of Arm Flexible Access​

License with no upfront fee

Approved users can browse, investigate, and download Artisan IP for use in evaluation through manufacturing.