Leading Implementation Solution for Cortex-A Processors
Arm POP IP is the bridge between Cortex-A CPU and silicon process technology. A highly optimized physical IP solution for the Cortex-A processor series, it offers a proven high-performance or high-density implementation solution, within a given power envelope, that helps lower technical and project risk.
POP IP is core-hardening acceleration technology designed to get you to market quickly. Arm expertise combined with an innovative logic and memory architecture help minimize area, leakage and dynamic power while optimizing performance.
Artisan Physical IP products deliver the most efficient and highest performance Arm Cortex processor implementations for our licensees. Detailed implementation knowledge includes floor plans, scripts, design utilities, and a POP IP Implementation Guide that details the methodology used to achieve similar implementation results quickly and at low risk.
POP IP enables multiple configurations, including low power to a high-performance, low-power combination, light sleep mode, and high-performance fast cache instances. Tightly coupled processor core and POP IP product development results in the flexibility to optimize for maximum performance, lowest power, or any combination in between.
The Artisan Physical IP and the optimized implementation delivered with POP IP are developed through a tightly coupled collaboration with Arm’s processor development teams in an iterative process to identify optimal performance and energy efficiency.
A comprehensive benchmarking report documents the exact conditions and results Arm achieved for the core implementation across an envelope of configuration and design targets.
All POP packages include a comprehensive RTL-GDS flow that supports major electronic design automation (EDA) vendors.
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Design and produce an SoC with the proven, industry-leading
Cortex-M0 and Cortex-M3 processors, for no upfront license fee,
and access thousands of Arm Artisan physical IP products for
fastest time to market.