Fast Arm Prototyping on FPGA
The MPS2+ FPGA Prototyping Board accelerates the design, prototyping, and evaluation of the complete Cortex-M family of processors with example designs and software support. This includes the latest Cortex-M processor, the Cortex-M33, and both Cortex-M3 and Cortex-M0 as part of the DesignStart program.
The Arm MPS2+ FPGA Prototyping Board can be loaded with fixed encrypted FPGA implementations of all Cortex-M processors, and includes peripherals like PSRAM, Ethernet, touch screen, audio, VGA, SPI, and GPIO.
MPS2+ supports an FPGA implementation of Arm SSE-100 Subsystem and Arm SSE-200 Subsystem, providing a software development platform with which to evaluate IoT subsystems with Mbed OS running on either Armv7-M or Armv8-M.
MPS2+ comes with an array of I/O and debug connectors, including Arm JTAG 20, 4bit RGB VGA, Arm parallel trace (MICTOR38), 20-pin Cortex debug, 10-pin Cortex debug, and ILA connector for FPGA debug.
Evaluate, design, and prototype Cortex-M0 and Cortex-M3 based designs as part of Arm DesignStart, which provides instant access to Arm IP with no upfront licensing fee, just a success-based royalty model.
Cortex-M Series Processors
Optimized for cost and power sensitive MCU and mixed-signal devices in applications such as IoT, human interface devices, automotive and domestic household appliances, consumer products, and medical instrumentation.
Arm Mbed OS
A free, open-source embedded operating system with everything needed to develop a connected product based on Arm Cortex-M, including security, connectivity, an RTOS, and device management.
The most comprehensive software development solution for Arm-based microcontrollers, with all the components to create, build, and debug embedded applications plus software packs for adding application building blocks.
Arm Development Studio
A complete tool suite for C/C++ development on Arm-based SoCs, including Eclipse, Arm Compiler 5/6, Arm Development Studio Debugger, Mali Graphics Debugger, trace display, and auto-detection of SoC infrastructure.