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Pushing the boundaries of analog and mixed signal designs with Cortex-M technologies
13 July 2010
Venue: Chalet Edelwiis by AlpenRock House
Location: Zurich-Kloten, Switzerland
According to TSMC an average 65 nm design has more than 20% of its die size allocated to analog blocks. With next generation devices demanding more signal processing capabilities for highly energy efficient designs in very aggressive time-to-market targets, designing some of these blocks in analog is becoming harder. Also, the complexity of integration and verification of analog blocks grows exponentially on smaller technology nodes.
Hence new ways to reduce the time and effort required for this challenge are being demanded!
To meet these industry challenges, ARM introduced the Cortex-M series of processors that until recently, comprised of the Cortex-M0 and Cortex-M3 processors. Now, with the recently announced Cortex-M4, ARM adds digital signal control capabilities into a highly successful processor portfolio to present the most energy efficient 32-bit embedded processor for digital signal controllers.
However, a successful mixed signal design is more than just selecting the right processor for the job. Leading tools and flows from Cadence lead you to your desired design quicker and more efficiently.
ARM and Cadence would like to invite to a one day event to highlight the various design choices and best design practices for your next mixed signal design.
9:00 - 9:15 Welcome
9:15 - 09:45 Introduction to the Cortex-M series of processors
9:45 - 10:45 A technical overview of the Cortex-M4 processor architecture
How mixed signal designs can benefit from the most energy efficient 32-bit processor for digital signal control
10.45 - 11:05 Coffee break
11:05 - 12:05 Physical IP for low power embedded designs
Ultra high density standard cells and power management on typical mixed signal nodes
12:05 - 13:00 Lunch
13:00 - 14:00 Reducing design complexity by applying digital signal control techniques to mixed signal designs
14:00 - 14:20 Coffee
14:20 - 15:20 Design and Implementation of Cortex-M4 based projects with a Cadence Analog Mixed Signal Flow
15:20 - 16:20 Chip-Planning of a Cortex-M series based design using ChipEstimate IP Portal and Cadence's Incyte
16:20 - 16:30 Questions
For this event, we picked a classic Swiss wooden lodge in walking distance to the Zürich airport for a convenient journey.
