Design Automation Conference (DAC)
Venue:
Moscone Convention Center
Location:
747 Howard Street, San Francisco, CA
Date:
03 June 2012 - 07 June 2012
Room/Booth/Stand:
1414
The Design Automation Conference is the world's leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business. DAC is also where the latest technical research is presented. DAC covers all topics related to the design of complex systems on chip: Embedded system design down to physical layout verification. Now in its 49th consecutive year, DAC is the most respected name in the chip design community.
Exhibit Hours
| Monday, June 4 | Tuesday, June 5 | Wednesday, June 6 |
|---|---|---|
| 9:00 am - 6:00 pm | 9:00 am - 6:00 pm | 9:00 am - 6:00 pm |
ARM Booth 1414
Collaboration across the electronics industry is essential to drive greater industry innovation and ensure customer success. Learn how ARM and the ARM Connected Community Partners are working together with the world's leading semiconductor and consumer electronics companies to drive innovative, energy-efficient and high-performance devices that are powering the world around us. Hear presentations on the latest ARM® solutions, as well as success stories of collaborative efforts on ARM technology-based solutions from customers and partners. Visit our booth to view demos on ARM processor technologies and how to more quickly optimize these solutions for your designs.
NEW at DAC! ARM Connected Community Pavilion - Booth 802
DAC and ARM have partnered to bring to DAC the ARM Connected Community Pavilion, where you'll be able to see some of the latest innovations from ARM's EDA and Embedded Partners. Stop by to check out their solutions and become eligible for a special ARM giveaway. Participating partners include:
The ARM Connected Community is a global network of more than 900 companies aligned to provide a complete solution, from design to manufacture and end use, for products based on the ARM architecture.
ARM and Cadence - Booth 1930
| DATE | TOPIC | SPEAKER | TIME | LOCATION |
|---|---|---|---|---|
| Monday, June 4 | Design for Performance at 28nm and Below | Rob Aitken, Fellow | 10:00 am | Cadence booth |
| Tuesday, June 5 | ARM Fast Models at the Heart of Virtual Prototyping | Robert Kaye, Technical Specialist | 11:00 am | Cadence booth |
| Tuesday, June 5 | Overcoming the Challenges of Embedding Ultra Low-Power, ARM 32-bitProcessors into Analog/Mixed-Signal Designs Register Now: www.cadence.com | Dominic Pajak, Product Marketing | 12:00 pm – 1:00 pm (doors open and food is served at 11:30 am) | 270-276 (Moscone Convention Center) |
| Tuesday, June 5 | ARM big.LITTLE™ processing: Saving Power through HeterogeneousMultiprocessing and Task Context Migration | Brian Jeff, Product Manager | 12:30 pm | Cadence booth |
| Tuesday, June 5 | The new ARM Cortex™-M0+ Processor | Dominic Pajak | 3:00 pm | Cadence booth |
| Wednesday, June 6 | Breakfast Panel The Path to Yielding at 2(x)nm and Beyond | Dipesh Patel, Deputy General Manager and VP, Engineering, Physical IP Division | 8:00 am – 9:00 am (doors open and breakfast is served at 7:30 am) | 270-276 (Moscone Convention Center) |
| Wednesday, June 6 | ARM® Cortex™ Processor Optimization Pack™ solutions – Speeding time to market for technology-leading implementations | John Ford, Director Product Marketing, Physical IP Division | 2:3 0pm | Cadence booth |
ARM and ChipEstimate - Booth 1202
| DATE | TOPIC | SPEAKER | TIME | |
|---|---|---|---|---|
| Monday, June 4 | Opening Keynote – Realizing the Next Wave of Smart Devices | John Heinlein | 11:30 am | |
| Monday, June 4 | IP Talks! –ARM Embedded Software 2.0 | Will Tu, Director of Business Development | 4:30 pm | |
Join us at a cocktail reception immediately following Will's presentation | ||||
| Tuesday, June 5 | IP Talks! – ARM big.LITTLE processing: Saving Power through HeterogeneousMultiprocessing and Task Context Migration | Brian Jeff, Product Manager | 3:30 pm | |
| Wednesday June 6 | IP Talks! –The new ARM Cortex™-M0+ Processor | Dominic Pajak | 4:00 pm | |
ARM and Duolog - Booth 1520
| DATE | TOPIC | SPEAKER | TIME |
|---|---|---|---|
| Tuesday, June 5 | 'Integration Forum' Panel SoC Integration – What's all the fuss about? | Paul Martin | 2:30 pm |
| Wednesday, June 6 | IP Standardization –What's in it for me? | Paul Martin | 2:30 pm |
ARM and GLOBALFOUNDRIES - Booth 303
The ARM® Artisan® physical IP platforms deliver optimized IP for best-in-class processor implementations on GLOBALFOUNDRIES manufacturing processes. These platforms are comprised of easy-to-use logic libraries, memory compilers and interface IP offering System-on-Chip (SoC) designers the ability to balance performance, power, and area for optimal SoC designs and reduced time-to-market. Check out a demo of an ARM Processor Optimization Pack™ (POP) solutions optimized for GLOBALFOUNDRIES' 28nm SLP process technology.
Leveraging the ARM Cortex™-A9 Processor Optimization Pack™ (POP) Solution on GLOBALFOUNDRIES' 28nm SLP
Monday, June 4, 11:00 am - 12:00 pm
Wednesday, June 6, 12:00 pm - 1:00 pm
ARM and Mentor Graphics - Booth 1530
Monday, June 4
Panel: The Hitchhiker's Guide to Multi-Patterning
ARM Speaker: Dr. Rob Aitken, R&D Fellow
2:00 - 3:00 pm
Location: Mentor Booth #1530
Tuesday, June 5
10th Annual ESL Symposium Panel The ESL Hotspot - Where Software and Hardware Meet ARM Panelist: John Goodenough, VP Design Technology and Automation
12:00 pm - 1:30 pm
Location: Convention Center; Gateway Ballroom, #104
Panel: Fasten Your Seatbelt -- We're Going to 14nm!
ARM Speaker: Dr. Dipesh Patel, Deputy General Manager, Physical IP Division
2:00 pm - 3:00 pm
Location: Mentor Booth 1530
ARM and Mentor Verification Academy - Booth 1514.
Monday, June 4
An Introduction to AMBA 4 AXI Coherency Extensions (ACE) and Verification Challenges ARM
Speaker: Paul Martin, Design Enablement and Alliances Manager
4:00 pm
ARM and Samsung - Booth 2001
High Performance and Power Efficiency with ARM Artisan Physical IP ARM Speaker: Ron Moore, Director, Strategic Accounts Marketing
Monday, June 4, 1:30 pm - 2:00 pm
Wednesday, June 6, 4:30 pm - 5:00 pm
ARM and Synopsys - Booth 1130
Tuesday, June 5
Joint Breakfast with GLOBALFOUNDRIES, Samsung and Synopsys
Breaking Through Barriers: High Performance and Energy Efficient ARM Powered® SoCs at 32/28nm and 20nm
ARM Speaker: John Heinlein
7:15 am - 8:45 am
Location: Marriott Marquis / Golden Gate A
ARM and TSMC - Booth 2430
The ARM® POP: Fast Track to High-Performance Cortex-A15 Processor Implementation on TSMC 28nm Processes
ARM Speaker: Leah Schuth, Technical Marketing Manager, Physical IP Division
Monday, June 4, 4:30 pm - 4:40 pm
Tuesday, June 5, 10:00 am - 10:10 am
Wednesday, June 6, 2:00 pm - 2:10 pm
Ask the Experts!
Here's your chance to pick the brains of leading ARM technologists over a free cup of coffee. Have questions about advanced power management, low power design, implementation and verification, what's next in low power IP deployment, FinFETs or AoCV among other topics? Take a break in the Ask the Experts' section of the ARM Connected Community Pavilion, where you will find free coffee and lively conversation:
| DATE | TIME | EXPERT! |
|---|---|---|
| Monday, June 4 | 10:30 am – 11:15 am | Dr. Rob Aitken, ARM Fellow |
| Monday, June 4 | 2:00 pm – 2:45 pm | Dr. David Flynn, ARM Fellow |
| Monday, June 4 | 3:00 pm – 3:45 pm | Dr. Dipesh Patel, Deputy General Manager and VP, Engineering, Physical IP Division |
| Tuesday, June 5 | 10:30 am – 11:15 am | Dr. David Flynn, ARM Fellow |
| Tuesday, June 5 | 2:00 pm – 2:45 pm | Dr. Rob Aitken, ARM Fellow |
Collaboration across the electronics industry is essential to drive greater industry innovation and ensure customer success. Learn how ARM and the ARM® Connected Community® partners are working together with the world’s leading semiconductor and consumer electronics companies to drive innovative, energy-efficient and high-performance devices that are powering the world around us. Hear presentations on the latest ARM solutions, as well as success stories of collaborative efforts on ARM-based solutions from customers and partners at ARM Booth 1414.
Monday, June 4, 2012
| Time | Company | Presentation Title | Presenter |
|---|---|---|---|
| 10:00AM | ARM | Building compute sub-systems Cortex processors with CoreLink 400 system IP | Paul Martin, Design Enablement and Alliances Manager |
| 10:30AM | Mentor | Pre-Silicon, Native Embedded Software Development Solutions | Jon McDonald, Strategic Program Manager |
| 11:00AM | EVE | Hardware/Software Co-verification with EVE and ARM | Lauro Rizzatti, GM and WW VP Marketing |
| 11:30AM | TSMC | ||
| 12:00PM - 1:00PM | LUNCH BREAK | ||
| 1:30PM | ASTC/Vworks | Powered by VLAB – A new generation of Virtual Development Platforms and Products | Jay Yantchev, CEO |
| 2:00PM | ARM | Design for performance at 28nm and below | Rob Aitken, Fellow |
| 2:30PM | Cadence | Delivering Low-Power Mixed-Signal Designs with an Embedded ARM Cortex-M Processor | Mladen Nizic, Engineer Director |
| 3:00PM | Space Co-design | ESL Hardware/Software Codesign for ARM-based FPGA | Guy Bois, President Laurent Moss, CTO Gary Dare, General Manager |
| 3:30PM | ARM | big.LITTLE® System Architecture from ARM: Saving Power through Heterogeneous Multiprocessing and Task Context Migration | Brian Jeff, Product Manager |
| 4:00PM | Synopsys | Early bring-up and optimization of Android stacks for ARM big.LITTLE processing | Tom DeSchutter, Sr. Product Marketing Manager, System-Level Solutions |
| 4:30PM | ARM | An ARM perspective on "what's next" in SoC power management | David Flynn, Fellow |
| 5:00PM | Atrenta | Early PPA Analysis for AMBA-based Designs | Dr. Bernard Murphy, CTO |
| 5:30PM | Drawing for Apple® TV® |
Tuesday, June 5, 2012
| Time | Company | Presentation Title | Presenter |
|---|---|---|---|
| 10:00AM | ARM | FinFETs and IP Design | Vikas Chandra, Principal Design Engineer |
| 10:30AM | Cadence | Cadence System-to-Silicon Solution for ARM processors | Frank Schirrmeister, Product Management Group Director, System Design and Verification |
| 11:00AM | Apache | Power Budgeting with RTL Power Models for ARM IP-Based SoC Designs | Vic Kulkarni, Senior VP and GM, RTL Business Unit |
| 11:30AM | Samsung | ||
| 12:00PM - 1:00PM | LUNCH BREAK | ||
| 1:30PM | Jasper | Leveraging Formal Apps to Solve Tough Challenges and Improve Productivity Throughout the Design and Verification Flow | Oz Levia Vice President, Marketing |
| 2:00PM | ARM | Building better SRAMs | Betina Hold, Senior Principal Design Engineer |
| 2:30PM | Synopsys | Optimized ARM Cortex Processor Performance with Galaxy Implementation Platform | Phil Dworsky, Director of Strategic Alliances |
| 3:00PM | Zocalo | Zocalo Tech: Debugging Assertions Prior to Being Launched in the Verification Flow | Robert Biczek, VP Worldwide Sales |
| 3:30PM | ARM | Getting your ideal debug and trace capabilities with the minimum of fuss | Barry Spotts, Sr. Field Applications Engineer |
| 4:00PM | Mentor | Mentor Graphics Transforms Verification of ARM processor based SoCs | Dennis Brophy, Director, Strategic Business Development |
| 4:30PM | ARM | An ARM perspective on "what's next" in SoC power management | David Flynn, Fellow |
| 5:00PM | Docea Power | ESL power modeling and optimization for ARM based SoC architectures | Christophe Lucarz, PhD, Field Application Engineer |
| 5:30PM | Drawing for Apple® TV® |
Wednesday, June 6, 2012
| Time | Company | Presentation Title | Presenter |
|---|---|---|---|
| 10:00AM | ARM | Fast Models in SystemC/TLM design flows | Robert Kaye, Technical Specialist |
| 10:30AM | Synopsys | Discovery™ VIP and Reference Platform for ARM® AMBA® ACE™ Protocol | Neill Mullinger, Product Manager, Discovery Verification IP |
| 11:00AM | Carbon Design Systems | Accelerating the Development and Optimization of ARM-based SoCs | Bill Neifert, CTO, Founder |
| 11:30AM | GLOBALFOUNDRIES | ||
| 12:00PM - 1:00PM | LUNCH BREAK | ||
| 1:30PM | ARM | Advanced standard cell design | Paul de Dood, Director Technology - Design Automation |
| 2:00PM | Cadence | Enabling Faster and Lower Power ARM High-Performance Processors | James Davey, Marketing Director |
| 2:30PM | ARM | big.LITTLE System Architecture from ARM: Saving Power through Heterogeneous Multiprocessing and Task Context Migration | Brian Jeff, Product Manager |
| 3:00PM | SpringSoft | FPGA Prototyping - Debug and Verification with Protolink | Sam Miller |
| 3:30PM | ARM | FinFETs and IP Design | Vikas Chandra, Principal Design Engineer |
| 4:00PM | Mentor | Tessent Support of ARM Cores and Memories: Comprehensive and Integrated Test Solutions | Steve Pateras, Product Marketing Director, Silicon Test Products |
| 5:30PM | Drawing for Apple® TV® |
Conference Speakers
Hear from ARM executives, technology experts, and panelists as they discuss industry trends to help you prepare for the future and stay ahead of the competition.
| Date | Time | Location | Type | Topic | Speaker |
|---|---|---|---|---|---|
| Monday, June 4 | 8:30 AM — 5:30 PM | 309 | Tutorial | Pre-Silicon, Native Embedded Software Development Solutions | Robert Kaye, ARM |
| Tuesday, June 5 | 8:30 AM — 9:45 AM | 102/103 | Keynote | Scaling for 2020 Solutions | Mike Muller, CTO, ARM |
| Tuesday, June 5 | 1:30 PM — 3:00 PM | 305 | Panel | System Models – Does One Size Fit All? | John Goodenough, ARM |
| Tuesday, June 5 | 4:00 PM — 6:00 PM | 300 | Research Paper Session | Exploring Sub-20nm FinFET Design with Predictive Technology Models | Saurabh Sinha, ARM |
| Wednesday, June 6 | 4:00 PM — 6:00 PM | 308 | Research Paper Session | A QoS-Aware Memory Controller for Dynamically Balancing GPU and CPU Bandwidth Use in an MPSoC | Chander Sudanthi, ARM |
| Thursday, June 7 | 1:30 PM — 3:00 PM | 310 | Special Session | big.LITTLE System Architecture from ARM: Saving Power through Heterogenous Multiprocessing and Task Context Migration | Brian Jeff, ARM |
| Thursday, June 7 | 3:30 PM — 5:30 PM | 300 | Research Paper Session | Yielding in an Uncertain World | Rob Aitken, ARM |
DAC will be held at the Moscone Convention Center in San Francisco, CA.
If you are in the San Jose area and need a worry-free and inexpensive way to get to the Moscone Center, consider taking the bus!
New this year, DAC is providing bus transportation from one location in the San Jose area to the South Lobby of the Moscone center. The buses will run Monday, June 4 - Wednesday, June 6. Parking at the bus pick-up location will be free. Pick-up and departure times are listed below.
The DAC bus program is the least expensive option compared to the Caltrain or BART. Tickets can be included in your conference or booth staff registration.
If you have already pre-registered, go to the link in your confirmation email to add it. If you have not yet registered, click on the tab titled BUS TRANSPORTATION TICKETS during registration before you checkout.
Location:
Cadence Design Systems, Inc.
Parking Lot
2655 Seely Avenue, San Jose, CA 95134
Pick-up times from San Jose to the Moscone Center (approximately 1 hour ride):
7:00AM, 7:30AM & 8:00AM
Departure times from the Moscone Center to San Jose
:6:45PM, 7:15PM & 7:30PM
Buses are tentatively scheduled at three times each morning and evening for your convenience. You will be able to choose your pick-up and departure times during registration. Your Confirmation Email will be required to ride the bus.
To learn more about San Francisco and find out more information about transportation and sites to see while you’re there, visit the DAC website: www.dac.com
Get All of ARM’s Collateral Online!
Check out our 2012 DAC Virtual Totebag
This year, ARM is going to make it easy for you to get the information you want AND help protect the planet.
Rather than toting a heavy bag of brochures, datasheets and whitepapers around the exhibit hall, you can use our new Virtual Totebag to collect, store and share our content and our partners’ materials digitally – at your convenience!
It’s easy to use Virtual Totebag. Simply TEXT “VTB 9714” to 313131 and the document is immediately stored in your account.
Go to virtualtotebag.com to access your documents, search and browse all ARM and partner content.
