Login

Industry

CDNLive 2013 - US

Venue:

Hyatt Regency

Location:

5101 Great America Parkway, Santa Clara, CA

Date:

12 March 2013

Room/Booth/Stand:

Grand Ballrooms A-D 

Booth P5

 


CDNLive brings together Cadence® technology users, developers, and industry experts to network, share best practices on critical design and verification issues, and discover new techniques for realizing advanced silicon, SoCs, and systems. CDNLive has something for everyone:
  • A huge variety of user-presented technical papers
  • Live product demos of new features and capabilities
  • Roadmap presentations and exciting technology updates
  • Dynamic panel discussions and executive keynotes
  • Stimulating conversation and networking opportunities Cadence and ARM have collaborated for decades to develop comprehensive sets of optimized tools for the design and verification of high-performance ARM® processor-based designs. 

Our ongoing partnership provides system design engineers with verified, optimized and reusable hardware and software IP blocks ensuring higher first-time silicon manufacturing confidence, lower cost of SoC integration and early time to market. ARM will provide demonstrations, panel discussions and design expertise on SoC integration at the CDN Live Conferences. Please join us for the first event March 12-13, 2013, in Silicon Valley.

ARM Highlights include:

  • Live demonstration of ARM DesignStart™ IP online access portal DesignStart provides fast and efficient access to industry-leading ARM IP ranging from comprehensive Physical IP libraries to an array of processor design kits and other design-critical information
  • The DesignStart portal additionally extends to multimedia processor IP and enabling tools suite demonstration software facilitating a one-stop virtual shop for future SoC designs
  • ARM Scheduled Talks
    • 2:30 pm – 3:20 pm on 03.12.13, Brent McKanna - Principal Design Engineer, Targeting High Frequency and Power Efficient Implementations for ARM's High Performance Cortex-A57 Processor (Track - HP103)
    • 3:45 pm – 4:35 pm on 03.12.13, Sathyanath Subramanian - Technical Marketing Manager, High Performance/Low Power Implementation of ARM Cortex-A15 and Cortex-A7 with ARM POP IP for ARM big.LITTLE Systems and Applications (Track - HP104)
    • 4:45pm to 5:35 pm on 03.12.13, William Orme – Strategic Marketing Manager, ARM Ltd and Nick Heaton– Sr. Solutions Architect, Cadence Design Systems, Analyzing and Debugging Performance Issues with complex ARM CoreLink System IP Components (Track DVSY101)

For additional information and to register to attend the event, please visit the CDN Live web site HERE

Find out more about CDN Live World Wide.


Hyatt Regency - 5101 Great America Parkway, Grand Ballrooms A-D Booth P5, Santa Clara, California 95054                                                      

 


View CDNLive Agenda .

March 12, 2013

Time Title / Topic Speaker
2:30 pm – 3:20 pm Targeting High Frequency and Power Efficient Implementations for ARM's High Performance Cortex-A57 Processor (Track - HP103) Brent McKanna - Principal Design Engineer
3:45 pm – 4:35 pm High Performance/Low Power Implementation of ARM Cortex-A15 and Cortex-A7 with ARM POP IP for ARM big.LITTLE Systems and Applications (Track - HP104) Sathyanath Subramanian- Technical Marketing Manager
4:45pm - 5:35 pm Analyzing and Debugging Performance Issues with complex ARM CoreLink System IP Components William Orme – Strategic Marketing Manager, ARM Ltd and Nick Heaton– Sr. Solutions Architect, Cadence Design Systems



Cookies

We use cookies to give you the best experience on our website. By continuing to use our site you consent to our cookies.

Change Settings

Find out more about the cookies we set