Processor Optimization Pack (POP)

ARM has combined our technology leading processer technology with our Artisan Physical IP products to create Processor Optimization Packs (POPs) to deliver the highest performance Cortex A9 and A5 implementations. ARM's POPs are a integration of custom Physical IP, implementation knowledge and comprehensive benchmarking. POPs are co-developed with ARM's processor engineering team.

It is this unique and high level of core and physical IP co-development that produces these industry leading results, which could only be accomplished by ARM's vertically integrated IP capabilities. POPs are Also critical elements in implementing ARM hard macros, such as the Dual Core Cortex A9 hard macro for TSMC 40nmG process (show to the right). POPs give ARM Partners;

Full implementation solution in a highly usable configuration, includng NEON™ general-purpose SIMD engine
Flexibility to optimize for maximum performance, lowest power, or any combination in between
A predictable performance solution for Cortex A and M series cores
The shortest time-to-market by levergaing ARM implementation know how

POP Overview

Cortex A9

Cortex A5

Cortex M series

Roadmap

ARM Processor Optimzation Packs are really a combination of three critical element. First there is custom designed Artisan Physical IP; standard cells, logic and memory instances. This IP has been developed in concert with ARM Cortex processor cores by tightly coupled engineering teams from Processor Division and Physical IP Division. Next this IP is comprehensively benchmarked in an iterative process with literally hundreds of different implementations in order to determine the best possible solution. Then the solution is detailed in the exact conditions and configurations in a certifed benchmark report. And finally ARM provides dtail implementation knowledge in the form of the iRM and POP User Implementation Guide. This allows the customer to get the exact same results as achieved in the benchmarking report.

ARM currently offeres Cortex-A9 POPs at popular foundries for 40nm and 32nm geometries, all silicon proven by both ARM and our customers production SoC. ARM's A9 POP support single core, dual core or quad core configurations. At TSMC 40nmG process, ARM's A9 POP is used as the base for the Cortex A9 Osprey Hard Macro. Osprey is a Dual core implementation which delivers up to 2.0 GHz performance (typical conditions).

Nufront is an innovative Chinese semiconductor company which is targeting mobile, tablet and computing markets with Cortex-A9 SoC powered by ARM's POP enabled hard macros. They have achieved success in a broad range of technology including wireless communication system, video search system and digital image processing system. Nufront was first company to produce an SoC with the Osprey hard macro running at 2.0 GHz (typical conditions).

Follow this link to read more about Nufront's POP success.

ARM Cortex-A5 POP is targeted for low power, mid performance applications. The A5 POP is offered in single core and dual core configurations. The POP is also used to develop ARM Gannet Hard Macro, a single core A5 implemented on TSMC 40LP process with > 1.0 GHz performance (typical conditions).

ARM Cortex M series processors are among the most popular in the world. Billions of production SoC have been successfully implemented and shipped using the M series processor cores. The ARM M series POP supports M0, M1, M3 and M4 cores. ARM's M series POP has been successfuly used by microcontroller providers and well a wide range of ASSP providers. Focusing on the mainstream process nodes, M series POP customers are looking for the lowest power implementation and many include non-volitile memory as well.

ARM has an agressive roadmap for POPs at 28nm process tecnologies for Cortex-A9, Cortex-A15 and Cortex-A7 cores. By using The A15 core in conjuntion with the A7 core customer can benefit from the big.LITTLE configuration. ARM will be announcing 28nm POPs starting in December 2011.