OptimoDE Data Engines

ARM's OptimoDE Data Engines represent a new breed of signal processing soft cores targeted at power-efficient, deeply embedded signal processing applications. Data Engines are increasingly integrated into SoCs as they allow offloading application-critical signal processing tasks from the more general-purpose CPUs and/or DSPs in the system, significantly reducing both system complexity and power-consumption.

OptimoDE Data Engines are pre-designed, non-modifiable software-programmable IP cores that are developed by ARM using OptimoDE Data Engine Technology and Framework. OptimoDE Data Engines have been optimized for specific application domains, typically running critical signal processing tasks in half of the cycles and with half of the gate-count of more general purpose DSP-architectures. This yields a significant reduction in power consumption while maintaining the flexibility of a SW-programmable architecture.

AudioDE for example, is a class-leading digital audio solution for designers of portable audio products. AudioDE™, derived from ARM's OptimoDE™ technology is configured to meet the challenges of high performance and low cost while delivering exceptionally low power consumption. The AudioDE processor requires minimal MHz for its tasks, has a very small core size and small memory footprint. When implemented in 0.13 micron geometry (Artisan TSMC CL013GSFG, operating voltage 1.2V) the processor consumes a mere 0.1mW per MHz. It can decode a 320kbps MP3 bit-stream with a clock rate of 8 MHz while yielding a total power consumption of well below 2mW (Artisan TSMC CL013GSFG, operating voltage 1.2V and including subsystem and memories).

Data Engine soft cores are delivered with a modifiable reference subsystem for fast and easy integration. The subsystem is delivered complete with example software drivers and an OpenMax compatible API to abstract the Data Engine from a software point of view. The bundled AMBA Integration Kit for OptimoDE provides an easy and optimal integration in AMBA/AXI-based systems. Both master (high autonomy) and slave (reusing already existing system infrastructure) configurations are supported for maximum flexibility. Data Engine RTL is fully compatible with industry standard clock-gating insertion and provides many hooks for system-level power reduction and management (stall-modes, clock-control, voltage islands, cycle-counters, etc.).

OptimoDE Data Engines are programmed in either C or C++ through a sophisticated dataflow compiler (DEvelop), automatically scheduling and parallelizing instructions to take advantage of the specific instruction set(s) of the Data Engine. The parallelizing compiler achieves a code-efficiency, both in terms of performance and code-density that is as good as handcrafted assembly code. Since the tools can be operated in an interactive environment, feedback is provided for optimizations at the source level and for trade-offs between speed and object code size.

OptimoDE is an extremely flexible Variable Length Long Instruction Word (VL-LIW) processor architecture. The processor's compute and address generation architecture as well as the memory and I/O bandwidth, and the associated instruction set(s), can be almost infinitely varied in order to obtain an optimal balance of performance, power consumption and area - Optimal Data Engine Technology. ARM uses the OptimoDE Framework to develop the most compelling signal processing IP cores: the OptimoDE Data Engine soft cores.