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AMBA 3 Specification
The AMBA 3 specification defines a set of four interface protocols that, between them, cover the on-chip data traffic requirements
from data intensive processing components requiring high data throughput, low bandwidth communication requiring low gate count
and power and on-chip test and debug access. The interfaces are:
AMBA 3 AXI Interface
The AMBA 3 AXI interface specification provides the characteristics to support highly effective data traffic throughput. The
five unidirectional channels with flexible relative timing between them, and multiple outstanding transactions with out-of-order
data capability enable:
- Pipelined interconnect for high speed operation
- Efficient bridging between frequencies for power management
- Simultaneous read and write transactions
- Efficient support of high initial latency peripherals
AMBA 3 AHB Interface
The AMBA 3 AHB interface specification enables highly efficient interconnect between simpler peripherals in a single frequency
subsystem where the performance of AMBA 3 AXI is not required. Its fixed pipelined structure and unidirectional channels enable
compatibility with peripherals developed for the AMBA 2 AHB-Lite specification.
AMBA 3 APB Interface
The AMBA 3 APB interface specification supports the low bandwidth transactions necessary to access configuration registers
in peripherals and data traffic through low bandwidth peripherals. The highly compact and low power interface isolates this
data traffic from the high performance AMBA 3 AHB and AMBA 3 AXI interconnects. The AMBA 3 APB interface is fully backwards
compatible with the AMBA 2 APB interface allowing existing APB peripherals to be used.
AMBA 3 ATB Interface
The AMBA 3 ATB interface specification adds a data agnostic interface for trace data in a trace system to the AMBA specification.
The trace components and bus sit in parallel with the peripherals and interconnect and provide visibility for debug purposes.
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