The compute platform for the agentic era
AI Summary
AI is transforming the data center, and agentic AI is creating a new generation of infrastructure demands. At OCP Global Summit 2026, Arm will showcase how we are building the compute foundation for this next era of AI, led by Arm AGI CPU and an ecosystem spanning silicon, systems, software, and cloud. Discover how Arm is helping the industry rethink AI infrastructure for greater performance, efficiency, and scalability, while enabling the open ecosystem to innovate faster and deploy AI at unprecedented scale.
Visit Arm at Booth C72
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Get hands-on and learn about commercial Arm AGI CPU racks and servers from Arm ecosystem partners.
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Experience next-generation agentic AI demos powered by Arm AGI CPU.
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Learn how Arm's contributions to reference designs, chiplets, system architecture, and firmware are making it faster and easier to build and adopt Arm AGI CPU.
Key features of the Arm AGI CPU
The agentic decade starts with open infrastructure
Mohamed Awad, EVP Cloud AI, Arm
Join Mohamed Awad, EVP of Arm's Cloud AI Business Unit, for a community-centered view of how open standards can turn agentic AI from bespoke deployments into scalable, efficient infrastructure. Learn why CPUs are the orchestration layer for AI systems and how standardized server, firmware, management, rack, power, and cooling foundations can help scale the agentic era.
Agenda at glance
| Time | Sessions | Location |
|---|---|---|
|
1:15 pm – 1:35 pm |
The systems challenge of agentic AI presented by Arm |
SJCC - Concourse Level - 210AE |
|
2:30 pm – 2:50 pm |
Scaling AI inference infrastructure from silicon to system presented by ASRock Rack |
SJCC - Concourse Level - 212 |
|
5:20 pm – 5:40 pm |
Arm Keynote – The agentic decade starts with open infrastructure |
SJCC - Street Level - South Hall |
| Time | Sessions | Location |
|---|---|---|
|
1:10 pm – 1:25 pm |
Designing infrastructure for agentic AI: From servers to systems presented by Arm |
SJCC - Concourse Level - Expo Hall Theater |
|
4:15 pm – 4:30 pm |
From AI PC to AI infrastructure: Platform contracts for scalable CPU–accelerator systems |
SJCC - Concourse Level - 211 |
|
4:25 pm – 4:40 pm |
OCP RAS API PLDM Modeling |
SJCC – Lower Level LL21BC |
|
4:45 pm – 5:00 pm |
SBSA: Advancing Arm server system architecture in the OCP ecosystem |
SJCC - Concourse Level - 212 |
| Time | Sessions | Location |
|---|---|---|
|
8:15 am – 9:10 am |
OCP hardware fault management workstreams status and relationship |
SJCC - Concourse Level - 211 |
| Time | Sessions | Location |
|---|---|---|
|
8:00 am – 8:15 am |
The open chiplet economy: Progress, challenges, and the road ahead |
SJCC - Concourse Level - 211 |
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8:25 am – 8:45 am |
Node-to-rack efficiency for real-world AI inference: Arm and FuriosaAI for scalable open infrastructure |
SJCC - Concourse Level - 220B |
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8:45 am – 9:05 am |
Endorsements for attestation: A common language for the whole supply chain |
SJCC - Concourse Level - 212 |
|
9:10 am – 9:30 am |
Building interoperable AI systems with chiplets: Arm Neoverse and Cadence in an open ecosystem |
SJCC - Concourse Level - 211 |
|
9:45 am – 10:10 am |
USB to rule them all: One manageability interface for AI platforms |
SJCC - Concourse Level - 220B |
|
10:30 am – 11:10 am |
AI-native virtual chiplet eco-systems with industry best practices to accelerate chiplet adoption |
SJCC - Concourse Level - 211 |
|
12:30 pm – 12:50 pm |
Scaling AI inference with Arm AGI CPU, Rebellions, RebelCard, and OCP ORv3 rack design |
SJCC - Concourse Level -220B |
|
1:10 pm – 1:30 pm |
Securing the open chiplet ecosystem: Defining a common security architecture for FCSA |
SJCC - Concourse Level - 211 |
|
2:05 pm – 2:30 pm |
Building bridges for adoption: OCP, standards bodies, and open source firmware |
SJCC - Concourse Level - LL20BCD |
|
2:45 pm – 3:05 pm |
Introduction to a new OCP FCSA sub-project workstream |
SJCC - Concourse Level - 211 |
|
3:10 pm – 3:30 pm |
Applying OCP ORv3 and ORW design principles to rack-scale Arm AI infrastructure with Supermicro |
SJCC - Concourse Level - 230A |
The world’s most efficient agentic CPU
Arm AGI CPU
Arm AGI CPU is Arm's first production silicon, purpose-built for agentic AI. It delivers more than 2x performance per rack versus x86 and is used in servers from Meta, Lenovo, Supermicro, and ASRock.
Arm AGI CPU coming soon to data centers from
Arm AGI CPU servers

Arm AGI CPU 1OU Dual NodeReference Server
Reference design for maximum density deployments of Arm AGI CPU – in a OCP DC-MHS standard form factor 1OU Dual Node server.

Arm AGI CPU 2U2PReference Server
19” 2U2P reference design for Arm AGI CPU deployment in a traditional form factor.

Lenovo HR650a V3 2U Arm AGI CPU System
Enterprise-class 2U Arm AGI server optimized for cloud infrastructure, delivering reliable performance and low TCO.

Supermicro 5U Arm AGI CPU PCIe GPU System
High-density 5U AI platform combining dual Arm AGI CPUs with extensive PCIe GPU expansion.

Supermicro 2U Hyper Arm AGI CPU Hyper System
Compact 2U dual-socket Arm AGI server designed for efficient cloud and AI infrastructure deployments.

Supermicro 2U4N Arm AGI CPU Liquid-Cooled Server
Liquid-cooled 2U 4-node server for cloud and AI workloads, including agentic AI and AI pre-processing, offering maximum performance, density, and efficiency.

Supermicro 2U Hyper-E
Arm AGI CPU Server
Single-socket 2U server with up to 3TB of memory for cloud and edge computing.

ASRock Rack 2OU2N-ArmSystem
High-density dual-node Arm server built to OCP ORv3 standards for scalable, power-efficient cloud deployments.
Arm AGI CPU liquid cooled rack-scale systems

Supermicro 1U 4-Node
Arm AGI CPU Rack-Scale Solution
Maximum compute density multi-node liquid cooled ORW rack architecture, featuring 168 nodes with 336 Arm AGI CPUs totaling 45,696 cores.

Supermicro 2U 4-Node
Arm AGI CPU Rack-Scale Solution
Ultra-density multi-node liquid cooled ORv3 rack architecture, featuring 76 nodes with 152 Arm AGI CPUs totaling 20,672 cores.
Based on estimates.