Fundamentals of System-on-Chip Design on Arm Cortex-M Microcontrollers

Fundamentals of System-on-Chip Design on Arm Cortex-M Microcontrollers
By René Beuchat, Florian Depraz, Sahand Kashani, Andrea Guerrieri
ISBN 978-1-911531-33-3

This textbook aims to provide learners with an understanding of embedded systems built around Arm Cortex-M processor cores, a popular CPU architecture often used in modern low-power SoCs that target IoT applications. Readers will be introduced to the basic principles of an embedded system from a high-level hardware and software perspective and will then be taken through the fundamentals of microcontroller architectures and SoC-based designs.

Along the way, key topics such as chip design, the features and benefits of Arm’s Cortex-M processor architectures (including TrustZone, CMSIS and AMBA), interconnects, peripherals and memory management are discussed.

The material covered in this book can be considered as key background for any student intending to major in computer engineering and is suitable for use in an undergraduate course on digital design.

Table of Contents

1 A Memory-centric System Model
2 Basics of Chip Design
3 The Arm Cortex-M Processor Architecture
4 Interconnects
5 The Advanced Microcontroller Bus Architecture (AMBA)
6 Interfacing with the External World
7 Peripherals
8 Memory System
9 FPGA SoC Architecture
10 Software for SoCs

Access

This textbook aims to provide learners with an understanding of embedded systems built around Arm Cortex-M processor cores, a popular CPU architecture often used in modern low-power SoCs that target IoT applications. Readers will be introduced to the basic principles of an embedded system from a high-level hardware and software perspective and will then be taken through the fundamentals of microcontroller architectures and SoC-based designs.

About the Authors

Rene Beuchat
René Beuchat, HEPIA

René Beuchat has been an associate Professor at HEPIA – the Geneva School of Engineering, Architecture and Landscape – since 1987 and has worked at EPFL – the Swiss Federal Institute of Technology in Lausanne – since 1981 after receiving his BSc and MSc from both schools. Teaching has been a big part of his work throughout the years. René is a firm believer that cutting-edge technology can only be taught with personal experience and, as a result, participated in many research projects and collaborations with dozens of companies and universities. He has also supervised a few hundred student research projects, mainly through industrial collaborations in the field of embedded systems, networking, and FPGAs.

Andrea Guerrieri
Andrea Guerrieri, EPFL

Andrea Guerrieri is an electronic engineer, researcher, and lecturer with more than 15 years of experience in the field. He received his BSc and MSc degrees in Electronic Engineering respectively in 2010 and 2015 from Politecnico di Torino, becoming the Principal Engineer responsible for the development of the company’s flagship products. In 2017 he moved to Switzerland, joining the Processor Architecture Laboratory at EPFL, where he leads and participates in cutting-edge research projects. Andrea is a member of IEEE, author and co-author of multiple technical papers, and a reviewer for prestigious international conferences and scientific journals.

Florian Depraz
Florian Depraz, Kudelski Group

Florian Depraz is an embedded software engineer who graduated from EPFL in 2018. During his studies, he mostly worked on FPGAs and embedded systems. Interested in teaching and enabling people to develop their ideas, he became a course assistant and member of the LauzHack hackathon committee. Florian went to the UK and worked for three years at Arm in the Open Source Software department, contributing to projects for robotic and automotive platforms. He then decided to return to Switzerland and now works as an engineer within the Kudelski Group to build safer products for the IoT field.

Sahand Kashani
Sahand Kashani, EPFL

Sahand Kashani received his Master’s in computer engineering from EPFL in 2017. He is currently a PhD candidate in the School of Computer and Communication Sciences at EPFL. His research focuses on rethinking the traditional FPGA compiler flow to improve hardware design productivity for modern compute-intensive FPGA workloads. Sahand is a former student of René’s and has been working with FPGAs for over seven years. He is an avid systems geek and enjoys transmitting his passion for digital design and reconfigurable computing to students.