Rapid SoC Integration
ARM® Socrates™ IP Tooling provides System IP Tooling to hardware, software and verification teams to deliver fully integrated System IP. It is the only fully integrated solution for integrating ARM System IP. Socrates IP Tooling helps system designers to automate IP configuration and SoC integration, creating IP that is right first time in days, not months.
Internal benchmarking has shown an 8x improvement in schedule when design teams used Socrates IP Tooling for the first time: Lessons from the field - IP/SoC integration techniques that work.
The challenges of SoC integration
There are many problems facing design teams in today’s complex SoC designs. Creating initial SoC stitching/netlists can take weeks or even months, and even after all this effort many IP integration bugs are found through formal analysis or simulation, and some are never found at all. Due to this, it is difficult to qualify IP as "integration-ready" as many of these bugs are to do with inconsistent IP configurations. Solving these problems can cause major delays to designs and the overall product, leading to losses in revenue and a huge rise in costs.
Highly dependent System IP such as interconnect and debug is also on this critical path in the design cycle, making the job of designing the SoC to non-System IP experts a very difficult task. It is also currently very difficult to integrate 3rd party IP/custom IP within the SoC. The disconnect is obvious around the area of documentation which is never up to date, and the interoperability with EDA vendor tools.
The ARM Solution - ARM IP Tooling that ensures IP Standardization, Configuration & Intelligent Integration
ARM Socrates Design Environment
The ARM Socrates DE standardizes, configures and intelligently integrates IP with ARM IP to create a SoC. Architects and Designers can standardize any IP into the IEEE1685-2009 standard to be "integration-ready," configure standardized IP and intelligently integrate IP together quickly and efficiently.
ARM CoreSight™ Creator is a tool that guides users through the configuration and creation of an optimized and viable CoreSight Debug & Trace subsystem. Its rules-based methodology removes the need for CoreSight expertise and enables partners to generate a CoreSight subsystem in days with minimal engineering interaction.
ARM CoreLink™ Creator is a tool that guides users through the configuration and creation of an optimised and viable CoreLink Interconnect. Its rules-based design methodology generates IP components, stitches them together and validates the top level.
Lessons from the field - IP/SoC integration techniques that work
This paper presents a standards-based IP integration methodology. The solution presented combines the standardization of IP interfaces with a corresponding rules-based integration methodology that leverages these interfaces to provide rapid and high-quality IP integration. The capabilities, benefits and limitations of using IP-XACT to standardize configurable IP are explored, as well as how the industry is really using the IP-XACT standard.
IP-XACT Standardized IP Interfaces for Rapid IP Integration
This white paper will focus on the IP interface standardization mechanisms available in IP-XACT and provides detail on the constructs involved including bus interfaces, bus definitions and port mapping. It will also provide an overview of the standardization of Hardware/Software interfaces including memory-maps, registers and bitfields.
Solving Next Generation IP Configurability
This white paper will preset the various types and complexities of IP configurability and how these can be managed effectively using IP-XACT and other means. It will also provide an overview of what is currently being done in the industry and demonstrate different types of configurability solutions.