Accelerate Core Hardening for Cortex-A Series CPUs
Market-leading performance, power and size
Arm Artisan POP IP technology leverages our market-leading processor knowledge with our Artisan Physical IP products to deliver the most efficient and highest performance Arm Cortex processor implementations for our licensees.
Arm currently offers POP IP for a wide range of Arm processor cores including Cortex-A72 and Cortex-A53 (64-bit Arm big.LITTLE), Cortex-A72, Cortex-A53, Cortex-A35, Cortex-A9, Cortex-A7, Cortex-A5, Arm Mali T880/860 GPUs and Cortex-M series CPUs. POP IP is core-hardening acceleration technology for producing the best Arm processor implementations in the fastest time-to-market.
Arm's processor engineering teams and physical IP engineering teams work cooperatively to solve implementation challenges through tightly coupled processor core and POP IP product development. This unique, in-depth level of core and physical IP co-development produces industry-leading results, which could only be possible with Arm's vertically integrated IP capabilities.
The Arm POP IP solutions provide:
- Flexibility to optimize for maximum performance, lowest power, or any combination in between
- A predictable performance solution for Arm Cortex-A, Mali and Cortex-M processor implementations
- The shortest time-to-market by leveraging Arm low-power implementation knowledge
- Dependable production solutions using silicon validated IP
POP IP technology accelerates core hardening for Cortex-A series CPUs with market-leading performance, power and area. POP IP solutions are comprised of three critical elements necessary to achieve an optimized Arm core implementation.
- First, it contains Artisan Physical IP standard cells, logic and memory cache instances that are specifically tuned for a given Arm processor and foundry technology. This Physical IP is developed through a tightly coupled collaboration with Arm’s processor development teams in an iterative process to identify the optimal performance and the best energy efficiency.
- Second, it includes a comprehensive benchmarking report to document the exact conditions and results Arm achieved for the core implementation across an envelope of configuration and design targets.
- Finally, it includes detailed implementation knowledge including floor plans, scripts, design utilities, and a POP IP Implementation Guide that details the methodology used to achieve the result. This enables end customers to achieve similar implementation results quickly and at low risk.
Introducing IoT POP IP for Cortex-M33
Arm IoT POP IP is a collection of physical IP, reference flows, user guides and benchmarking data that optimize the implementation path for a low power SoC. You can leverage Arm know-how as well as an innovative logic and memory architecture to minimize area, leakage and dynamic power while optimizing performance. It is silicon proven physical IP on TSMC 40ULP that works seamlessly with the Arm Cortex-M33 processor and the Arm CoreLink SSE-200 subsystem.
We currently offer the Cortex-A72 POP IP products at popular foundries for 16nm FinFET geometries. Targeted at mobile and infrastructure markets, it can help customers achieve up to 3.0GHz performance in silicon while consuming very low power in a small area. POP IP for Cortex-A72 supports ECC as well as multiple L1/L2 configurations.
Developed in conjunction with Cortex-A72 CPU , Cortex-A72 POP IP includes specially customized memories, which tie the physical IP and RTL closely to deliver a highly optimized integrated solution. The POP IP package consists of Cortex-A optimized logic IP, high- performance fast cache instances (FCI), and customized memories, along with a comprehensive RTL-GDS flow supporting major EDA vendors.
The Cortex-A53 POP IP is a highly successful implementation solution for Cortex-A53 CPUs. Products based on the Cortex-A53 processor are shipping in high volumes in the smart-phone/tablet, DTV, and consumer electronics segments. Cortex-A53 POP IP is available on 28nm and 16nm FinFET process technologies. POP IP technology enables customers to implement Cortex-A53 processors in multiple configurations – from a low-power LITTLE CPU in an Arm big.LITTLE system to a high-performance/low-power combination in ‘octacore’ systems to a stand-alone high-performance quad-core CPU.
Arm Artisan POP IP supports multiple L1/L2 cache sizes, as well as support for ECC. The fast cache instances in Cortex-A53 support a special ‘Light Sleep Mode’ in conjunction with the Cortex-A53 CPU. The POP IP package consists of Cortex-A optimized logic IP, as well as high- performance fast cache instances (FCI), along with a comprehensive RTL-GDS flow supporting major EDA vendors.
We are initially offering the Cortex-A35 POP IP products on 28nm geometries. The Cortex-A35 POP IP technology supports single-core, dual-core or quad-core configurations. The Cortex-A35 processor can also be used as a stand-alone multi-core solution for low-power, mid-performance applications.
The Cortex-A7 POP IP is the most widely licensed POP IP and is available on 40nm and 28nm process technologies at multiple foundries. It is available in high-performance and low- power versions. The high-performance version can achieve over 2.0GHz in 28nm technology. The low-power version can achieve over 1.0GHz performance while taking up less than 2 mm2 of area.
The Arm POP IP package consists of Cortex-A optimized logic IP and high-performance fast cache instances (FCI), along with a comprehensive RTL-GDS flow supporting major EDA vendors.
Arm POP IP delivers process-optimized IP for best-in-class implementations of the Mali-T860 graphics processor. Developed in synergistic collaboration by Arm GPU implementation at 28nm, Mali delivers complex graphics use-cases from advanced gaming to high-end mobile devices. Additionally, the Mali GPU family enables stunning visuals for UHD content.