Optimized for Advanced Deep Submicron SoC Designs
Arm Artisan SRAM, Register File and ROM Memory Compilers and instances are the ideal choice for all types of advanced deep submicron SoC designs. Artisan High-Speed and High-Density Memory Architectures deliver optimized performance, power and area results for designs ranging from performance critical to cost sensitive and low power applications.
Arm Fast Cache Instances are delivered as part of POP IP tune performance, power and area when building Arm Processors, Graphics and System IP.
Features and Benefits
A wide variety of memory compilers with multiple periphery VT options, power management modes and rich feature sets optimized for a wide range of applications.
Silicon-proven architecture provides optimized PPA for all types of SoC designs, ranging from performance-critical to cost-sensitive and low-power applications. The Artisan product portfolio covers over 15 foundries and numerous process variants.
Artisan memories support ECC, BIST, and redundancy to improve yield and post-silicon performance tuning.
Multiple power management modes support low leakage requirements for IoT SOC design.
Talk with an Expert
Need help understanding your SoC design and application requirements? Let’s talk about the right Arm Embedded Memory IP solution for you.
DesignStart Tier of Arm Flexible Access
Approved users can browse, investigate and download Artisan IP for use in evaluation through manufacturing. Get started designing your innovations today.