Platform Security Architecture (PSA)
With the explosive growth of connected devices, security has become an unprecedented global challenge. The Arm PSA is an architecture-agnostic framework for securing the next one trillion connected devices, from endpoint to cloud.
Four key phases of the PSA cover security analyses, architecture specifications, open source firmware code and independent certification. This common foundation lets you design in security from the ground up.
The PSA splits security into four key phases: analyze, architect, implement, and certify.
An evaluation of your device assets is the fundamental starting point of any security design. Assessing the threats to your device is essential to establish a clear set of security requirements.
A set of hardware and firmware specifications allow you to start your SoC or device design, building in the security requirements defined in the analyze phase.
An open source reference implementation that complies with specifications from the architect phase. SoC developers and OEMs can use Trusted Firmware-M as a standard/trusted code base.
A certification scheme that provides multi-level assurance for PSA devices, based on the security requirements established in the analyze phase.
Arm’s security portfolio helps protect against a broad spectrum of attacks, allowing partners to deploy the security level that best matches application needs. Achieving layered security involves implementing technologies, processes and measures designed to protect systems, networks, and data from a range of attacks.
For Root of Trust implementors, a test suite demonstrates correct functioning of the PSA Root of Trust APIs. For developers, security service APIs provide a consistent developer experience independent of security hardware implementation. Open source API test suite implementations help developers cross-check functionality and ensure interoperability.
Arm provides a range of security IP products designed to protect against a variety of attacks. Arm security IP extends across the system with processors and subsystem protection (both hardware and software), as well as acceleration and offloading.