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Design for simplicity to propel the Internet of Everything

For the Internet of Things (IoT) to scale, not only do most supporting devices need to be tiny and connected, they must be inexpensive.

It’s one thing to create a factory automation system with fixed sensors and perhaps edge computing devices all plugged into mains power. But there is a vast range of applications in the Internet of Everything in which the cost of the electronics and accompanying software must be radically reduced and power constraints can be significant. This is particularly the case for end products where the cost is low – $10 or less.

Much of the potential for these types of IoT applications can be found in fast-moving consumer goods (FMCG), where affordable, flexible devices that leverage machine learning could transform the industry.

The possibilities are almost endless: fraud and forgery detection, improved logistics, better consumer information, to name a few. Imagine no longer searching for the tiny print on the side of a package that reads “please consume by” a certain date. Tiny ML-powered devices in such packaging could signal when the perishable product has actually gone off, rather than the consumer having to perform a smell test. In some cases (medicines and medical creams for example) is impossible for a human to tell when the usefulness of the product has ended. In this case, by simply “smelling”, small, inexpensive, ML-powered devices could help eliminate confusion and waste and save the world billions of dollars.

Rethinking design for Everyday IoT

Ultra-low cost in this everyday IoT space can be difficult to achieve with conventional electronics. Silicon continues to drive to smaller and smaller feature sizes in order to achieve the lowest cost per function. But this has increased the absolute cost of relatively simple functions, and led to general-purpose hardware that is then programmed for particular applications, rather than optimising the hardware for the applications, sometimes referred to as the Turing Tax.

Because FMCG products have short shelf life and require low power consumption, the processors in these products need to be bespoke rather than general-purpose. High volumes in FMCG and low-cost FlexIC fabrication processes offer an opportunity to develop low-cost and efficient bespoke ML processors for everyday IoT applications.

The time is ripe to go back to basics and design for low cost from the beginning – designing for simplicity rather than complexity. It’s an approach that Arm and PragmatIC have been working on for a couple of years, exploring the practical application of the combination of the two companies’ technologies.  

In July, Arm, PragmatIC and the University of Manchester presented a bespoke machine learning (ML) processor development framework at the first IEEE Conference on Flexible and Printable Sensors and Systems (FLEPS). The paper describes the design of a processor that will run an application in the most efficient way, only adding what is required and no more, making the end integrated circuit (IC) a domain-specific architecture. This design philosophy delivers lower cost and lower power solutions that are relatively simple to design and verify, resulting in a time from sensor data to IC fabrication of just weeks.

The FLEPS paper presents a methodology to generate bespoke ML processors for flexible electronics applications that includes ML software model algorithm development, ML hardware model development, hardware implementation, and fabrication.

Design for simplicity, detailed

In short, it works like this.

A software model of the ML algorithm is developed from the data collected from sensors. Given the data and requirements, the ML training and inference stage iterates over several ML algorithms written in Python pulled out of a software ML model library, and applies each model to the sensor data. Currently, the software ML model library contains supervised learning models such as SVM, Naïve Bayes, voting classifiers, multi-layer neural networks and binary neural networks.

The next stage takes the highly parametric hardware model of the selected software ML model from the Parametric ML Processor Model Library, which is written in Python using MyHDL.

The hardware implementation flow of a flexible bespoke ML processor uses the same steps and industry-standard EDA tools as can be found in a traditional silicon design flow. The flexible technology-specific standard cell library is designed in-house at Arm, and is based on PragmatIC’s production process and associated process design kit (PDK).

Lastly, for fabrication the methodology employs PragmatIC’s ‘fab-in-a-box’ manufacturing line, FlexLogIC®, which is based on a 200mm diameter wafer where repeated instances of the GDSII design are generated by running several sequences of material deposition, patterning and etching processes.

PragmatIC’s FlexLogIC® process can produce priority wafers in less than 24 hours, enabling rapid turnaround and evaluation of bespoke designs. All told, bespoke ML chips can be designed and manufactured in this process from application to fabrication in less than 4 weeks.

A new way of thinking

Much of the growth in IoT is going to come in areas that require inexpensive and flexible devices with bespoke ML functionality for everyday applications. This calls for a new way of thinking about design that can deliver significant cost reduction along with the customer functionality that general-purpose processors may not deliver in the same form factor or cost target.

At a time when processor design and manufacturing is becoming ever more complex, it’s time to design for simplicity.

(Scott White, CEO, PragmatIC contributed to this article and co-wrote the FLEPS paper with colleagues from the University of Manchester alongside Emre Ozer, Principal Research Engineer and his colleagues at Arm.)

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