06 June 2011
This webinar is only available on demand.
Learn about AMBA 4 ACE - 'AXI Coherency Extensions'. ACE introduces extensions to AMBA 4 AXI to support cache coherency amongst heterogeneous systems of CPUs and accelerators; cache maintenance operations; barrier transactions to enable consistent inter-device communications via shared memory; and Distributed Virtual Memory (DVM) signaling to enable consistent MMU address translation across multiple devices in an SoC.
This webinar will explain the concepts behind ACE, preparing you to go to the next level and read the full ACE specification which is available for download (registration is required) from the ARM website.