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ARM Cortex-R7 MPCore Hardware Design

ARM Training Course

Details on this training course are provided below. Please contact Support for information about booking any of ARM's training courses.



Summary:

This course is for engineers who will integrate the Cortex-R7MPcore in to an SoC design. It assumes no knowledge of ARM processors or associated bus protocols. It starts by introducing the essential ideas of the ARM architecture, micro-architecure and bus protocols. It then looks at the main blocks and behaviours of the C-R7MPcore. It also introduces CoreSight debug infrastructure and the embedded debug features of the C-R7 processors.

Prerequisites:

  • Some knowledge of embedded systems
  • Familiarity with digital logic and hardware/ASIC design issues
  • A basic awareness of ARM is useful but not essential

Audience:

Hardware design engineers who need to understand the issues involved when designing SoC's around the ARM Cortex-R7 processor core.

Length:

4 days

Modules:

  • The ARM Architecture
  • ARM v4T
  • ARM v6
  • ARM v7-R
  • Thumb and Thumb-2
  • ARM v6 Memory Types
  • PMSA-v6/7
  • Exception Handling
  • CPU Architectures
  • Memory Sub-Systems
  • Introduction to SMP & MESI
  • AXI Protocol
  • AXI Interconnection Architectures
  • NIC301
  • AMBA Designer
  • APB
  • Cortex-R7 MPCore Overview
  • Cortex-R7 Processor Core
  • Cortex-R7 L1 Sub-Systems
  • Cortex-R7 MPCore Sub-Systems
  • Cortex-R7 MPCore L2 Interfaces
  • Cortex-R7 Fault Tolerance Support
  • Cortex-R7 MPCore Configuration & Deployment
  • Cortex-R7 MPCore Implementation Overview
  • Cortex-R7 MPCore Clocks, Resets & Power Managament
  • Cortex-R7 MPCore Interrupt Controller
  • Initializing Cortex-R7 MPCore based Systems
  • L2CC-PL310
  • Introduction to CoreSight
  • Cortex-R7 Invasive Debug
  • Cortex-R7 Non-Invasive Debug
  • Cortex-R7 MPCore Integration

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