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ARM Cortex-A57 MPCore Hardware Design

ARM Private Training Course



Summary:

This course is designed for those who are designing hardware based around the Cortex-A57 MPCore processors.

Prerequisites:

  • Comprehensive knowledge of the ARMv8-A architecture (see notes below)
  • Familiarity with the AMBA on-chip bus architecture
  • Knowledge of embedded systems
  • Experience with digital logic and hardware/ASIC design issues

Audience:

Hardware design engineers who need to understand the issues involved when designing SoCs around the ARM Cortex-A57 MPCore processor.

Length:

3 days

Modules:

  • Cortex-A57/A53 Processor Overview
  • ARMv8 Architecture Overview
  • Cortex-A57 Processor Core
  • Cortex-A57/A53 Memory Management Unit
  • Cortex-A57 Memory Sub-Systems
  • Cortex-A57/A53 Clocks and Resets
  • Cortex-A57/A53 Power Management
  • CCI-400 Cache Coherent Interconnect (or CCN-504 Cache Coherent Network)
  • GIC-400 Interrupt Controller (or GIC-500 Interrupt Controller)
  • Cortex-A72/Cortex-A53 System Design Considerations
  • Cortex-A72/A53 Debug
  • Cortex-A72/A53 Booting
  • Cortex-A57 Configuration
  • Cortex-A53/A57 Integration Summary 

Notes:

For students who do not have the pre-requisite knowledge of the ARMv8-A architecture and AMBA, we provide an optional one-day introductory course on these subjects.

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