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downarrowUse of Synchronous Serial Port (PrimeCell PL022)
Applies to: General Versatile Issues, Versatile

The AB926EJ-S User Guide (ARM DUI 0225A) section 3.15 describes the Synchronous Serial Port (SSP) on this board, and implies that the port can be used as a master or a slave. This is misleading, as although the ARM926EJ-S Development Chip supports it, the slave related signals are not routed to the expansion connectors so only 'Master' is supported on the AB926EJ-S.

For reference, the SSP signals available on each type of Versatile baseboard are listed in the following table:

Signal Name

 PB926EJ-S

 AB926EJ-S

SSPnCS

 *

 *

nSSPOE

 *

 

nSSPCTLOE

 *

 
SSPCLKOUT

 *

 *

SSPCLKIN

 *

 
SSPFSSOUT

 *

 
SSPFSSIN

 *

 
SSPTXD

 *

 *

SSPRXD

 *

 *

Note that  it is not possible to gain access to the missing SSP signals on the AB926EJ-S PCB by connecting wire jumpers directly to the pads as they exit the chip, since these signals are not connected to vias. If you wish to use a 'Slave' configuration we recommend you use the Versatile/PB926EJ-S.






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