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 | What are the feature comparisons between the Logic Tiles for the Xilinx Virtex-II and Virtex-4 FPGA? | Applies to: Logic Tiles, Versatile
| [new 15 August 2007] This table lists the differences between Virtex-II and Virtex-4 Logic Tiles. | Feature | LT-XC2V6/8000 | LT-XC4V160/200 | Notes | | FPGA slices | 34 / 47K | 68 / 89K | Approximately 50% bigger and up to 40% faster | | Header X/Y/Z I/O pins | 914 / 918 | 918 | | | External clocks | 26 | 21 | CLK_LOOP3/4 removed as not normally used | | Tile clocks | 4 | 4 | OSC_CLK[2:0], CLK_24MHz | | ZBT SRAM | 4MB | - | Can use block RAM, up to 0.6/0.7MB on LX160/200 | | Config Flash images | 2 | 2 | | | User LEDs, switches | 8 | 8 | | | Config / Normal JTAG | Yes | Yes | | | Fold/Thru switches | Upper | Upper, Lower | Lower fold switches added to increase available I/O in stacks | | Variable I/O voltage | HDRX, HDRY | HDRX | | | Resets | 2 | 2 | | | Bit file encryption | Triple DES | 256-bit AES | Virtex-4 key is not programmed in production |
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