The rm_ExceptionDuringProcessing() function does not adjust the return address correctly when returning to Thumb code. To fix this it is necessary to examine the CPSR to decide whether to add 2 to the LR (for Thumb) or 4 (for ARM).

The impact of this is that if an exception occurs during the processing of an opcode, then the exception handler will not return to the correct address and unexpected behaviour may result. For example, in the case of a data abort that occurs when accessing memory, the behavior is that RM will not spot that an abort has occurred, and will indicate to the debugger that the access succeeded.

To fix this problem, apply the following changes to the rm_asm.s file from AFS 1.4:
1) Locate the following lines in the rm_ExceptionDuringProcessing() function:

        ; Restore registers from the stack.
        LDMFD   r13!, {a4, STATE, ip, lr} 

        ; Adjust the return address, so that we continue execution from the
        ; instruction after the one which generated the abort.
        ADDS    pc, lr, #4 

2) Replace the lines with:

        ; Examine the SPSR to see which state we are returning to.
        ; Set the Z flag according to the state:
        ;   set   = returning to Thumb state
        ;   clear = returning to ARM state
        MRS     a4, SPSR
        TST     a4, #(1 << 5)   ; see whether the T-bit is set 

        ; Restore registers from the stack.
        LDMFD   r13!, {a4, STATE, ip, lr} 

        ; Adjust the return address, so that we continue execution from the
        ; instruction after the one which generated the abort. Use the Z flag
        ; to decide how much to adjust the address by.
        ADDEQS  pc, lr, #4      ; return to ARM state
        ADDNES  pc, lr, #2      ; return to Thumb state 

(DE 132462)