Description
The SDT 2.50/2.51 ARMulator now provides more detailed cycle $statistics for Harvard architecture cores such as ARM9TDMI and StrongARM. For example:

armsd: pr $statistics
struct {
Instructions = 102, Core_Cycles = 222, ID_Cycles = 28,
I_Cycles = 110, Idle_Cycles = 11, D_Cycles = 73, Total = 222} 

These cycle counts indicate the number of cycles used on the separate Instruction (I) and Data (D) busses, but the meaning of each one is unfortunately not documented.

Solution
The meaning of each cycle counter is given below:

• Core_cycles = the number of core cycles (as distinct from bus cycles) - the ratio of core to bus is given in MCCFG in armul.cnf
• ID_Cycles = the number of cycles where both an instruction has been fetched AND data has been fetched.
• I_Cycles = the number of cycles where an instruction (only) has been fetched (no data fetched)
• Idle_Cycles = the number of true idle cycles.
• D_Cycles = the number of cycles where data (only) has been fetched (no instruction fetched).

The relation between these and the documented N, S, I, C cycle types is given in
arm250\source\win32\ARMulate\armflat.c and armmap.c:

/*
* On StrongARM there are four types of cycle - we'll reuse
* the four cycle counters for these:
*
* Instruction fetched, No data fetched N
* Instruction fetched, data fetched S
* No instruction fetched, No data fetched I
* No instruction fetched, data fetched C
*/