Yes, in ADS 1.1 and later the ARM compilers are capable of generating the enhanced multiply instructions, provided the code has been compiled for ARM Architecture v5TE with the "-cpu 5TE" option.

For example:

  int func1(short a, short b) { return a*b; } 

will compile to:

  SMULBB  r0,r0,r1
  BX      lr 

and:

  int func2(short a, short b, int c) { return ((a*b) + c); } 

will compile to:

  SMLABB  r0,r0,r1,r2
  BX      lr 

The compiler will not naturally generate the saturated mathematics instructions (QADD, QSUB, etc), because there is no correspondence between standard C and these instructions (note that the ARM compiler is a strict ANSI C compiler). However the inline assembler (__asm), as well as the full armasm assembler, fully support all 'new' instructions, and so QADD and other routines can be written in C via the inline assembler.

In ADS 1.2 and later, two new header files <armdsp.h> and <dspfns.h> are supplied in the "Include" directory. These provide DSP functionality such as saturating addition and short (16x16 bit) multiplication. <armdsp.h> provides functions corresponding exactly to the ARM9E instructions; <dspfns.h> provides a close approximation to the ITU's DSP primitives.

There are also functions in the C library, for example "real-time" division routines, that use the CLZ instruction and DSP multiplies. These division routines offer a more predictable performance for "real-time" applications, always completing within 45 cycles. You can link these routines into your project if it is built for ARM architecture v5TE and you reference "__use_realtime_division". For more details please see the ADS v1.2 Compilers and Libraries Guide.