This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.
ARM websites use two types of cookie: (1) those that enable the site to function and perform as required; and (2) analytical cookies which anonymously track visitors only while using the site. If you are not happy with this use of these cookies please review our Privacy Policy to learn how they can be disabled. By disabling cookies some features of the site will not work.
This course is designed for those who are designing SOCs based around the ARM Cortex-A8 processor core. Including an introduction to the ARM product range and supporting IP, the course covers the ARM Cortex-A8 core and AXI on-chip bus architecture, integrated NEON SIMD vector processing unit, real-time trace solution, simulation models, programmer's model and instruction sets are also covered.
Prerequisites:
Some knowledge of embedded systems
Familiarity with digital logic and hardware/ASIC design issues
A basic awareness of ARM is useful but not essential
Audience:
Hardware design engineers who need to understand the issues involved when designing SOCs around the ARM Cortex-A8 processor core.
Modules:
The ARM Architecture and Processor Cores
ARM CPU Architectures
ARM Cortex-A8 Overview
Memory Sub-systems, Memory Management and Memory Access