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ARM Training Course

Designing with CoreSight

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• Course Type:  Hardware

• Course Length:  2 day(s)

Summary:

This course is intended for engineers designing silicon devices based around ARM cores incorporating the CoreSight debug architecture. The course covers an introduction to CoreSight and then presents detailed material on each aspect of the technology.

Please note that the course assumes familiarity with ARM-based designs and with the AMBA/AXI on-chip bus architecture.

Prerequisites:

• A working knowledge of system-on-chip design.


• Familiarity with ARM technology.


• Familiarity with AMBA/AXI.

Audience:

Hardware design engineers who need to understand and work with the CoreSight debug architecture.

Modules:

• CoreSight Overview


• CoreSight Buses


• Programmer’s Model


• Topology Detection


• ETM Specification


• Control & Access (Debug Access Port, Embedded Cross Trigger)


• Sources (AHB Trace Macrocell, Embedded Trace Macrocells, Instrumentation Trace Macrocell, System Trace Macrocell)


• Link Components (Trace Funnel, Replicator, ATB Bridge)


• Sinks (Trace Port Interface Unit, Embedded Trace Buffer, Trace Memory Controller, Serial Wire Output, Serial Wire Viewer)


• Implementation


• Clocks, Reset & Power Management


• System Design


• Integration

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