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This course is designed for those who are designing hardware based around the Cortex-A15 and Cortex-A7 MPCore processors.
Prerequisites:
Comprehensive knowledge of the ARMv7-A architecture (see notes below)
Familiarity with the AMBA on-chip bus architecture
Knowledge of embedded systems
Experience with digital logic and hardware/ASIC design issues
Audience:
Hardware design engineers who need to understand the issues involved when designing SoCs around the ARM Cortex-A15 and Cortex-A7 MPCore processor.
Modules:
Cortex-A15/A7 Processor Overview
Cortex-A15 Processor Core
Cortex-A7 Processor Core
TrustZone Overview
Cortex-A15/A7 Memory Management Unit
Cortex-A15 Clocks and Resets
Cortex-A7 Clocks and Resets
Cortex-A15/A7 Power Management
Introduction to AMBA 3
Cortex-A15/A7 AMBA 4 Overview
CCI-400 Cache Coherent Interconnect
Cortex-A15 Memory Subsystems
Cortex-A7 Memory Subsystems
Interrupt Controller
Cortex-A15/Cortex-A7 System Design Considerations
Cortex-A15/A7 Debug
Cortex-A15 Configuration
Cortex-A7 Configuration
Cortex-A15/A7 Implementation
Cortex-A15/A7 Booting
Cortex-A15/A7 DFT & MBIST
Cortex-A15 Integration Summary
Cortex-A7 Integration Summary
Notes:
For students who do not have the pre-requisite knowledge of the ARMv7-A architecture and AMBA, we provide an optional one-day introductory course on these subjects.