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ARM Training Course

ARM Cortex-R5 Hardware Design

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• Course Type:  Hardware

• Course Length:  4 day(s)

Summary:

This course is designed for hardware engineers designing systems based around the ARM Cortex-R5 processor core. Including an introduction to the ARM product range and supporting IP, the course covers the ARM core range, programmer's model, instruction set architecture and AMBA on-chip bus architecture. The Cortex-R5 debug architecture is also covered. The course includes a number of worked examples to reinforce the lecture material.

Prerequisites:

• Some knowledge of embedded systems


• Familiarity with digital logic and hardware/ASIC design issues


• A basic awareness of ARM is useful but not essential

Audience:

Hardware design engineers who need to understand the issues involved when designing SoC's around the ARM Cortex-R5 processor core.

Modules:

• Introduction


• Cortex-R5 Overview


• Memory


• Cortex-R5 Instruction Sets


• System Fabric


• Cortex-R Exception Handling


• Cortex-R5 Processor Core


• Cortex-R5 L1 Sub-Systems


• Cortex-R5 L2 Interfaces


• Cortex-R5 Sub-Systems


• Cortex-R5 Error Handling Schemes


• Cortex-R5 Multi-processor Synchronization


• Cortex-R5 Memory Protection Unit


• Cortex-R5 Clocks, Resets & Power Management


• Cortex-R5 Initialization


• Cortex-R5 Debug


• Introduction to CoreSight


• Cortex-R5 Invasive Debug


• Cortex-R5 Non-invasive Debug


• Cortex-R5 Implementation


• Cortex-R5 Integration

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